- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , SoC Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Performance & Package Verification Responsibilities:… more
- Google (Sunnyvale, CA)
- ASIC Design Verification Engineer , Machine Learning _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, ... a specific focus on TPU architecture and its integration within AI/ML-driven systems. As an ASIC Design Verification Engineer , you will use design and … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Palo Alto Networks (Santa Clara, CA)
- …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ... - MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in...products from concept to mass production + Expertise in SystemVerilog and UVM + Technical strength in the following… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of ... or computer engineering or similar area (or equivalent experience) + 5+ years of verification experience + Exposure to Computer Architecture, ASIC design and … more
- NVIDIA (Santa Clara, CA)
- …or closely related degree (or equivalent experience) + Exposure to computer architecture, ASIC design, and verification methodology is required + Exposure to ... NVIDIA is seeking outstanding Verification Engineers with a specialty in tools and...Programming language + Fluency in Object Oriented Programming with SystemVerilog + Strong problem-solving, debugging and analytical skills Ways… more
- SpaceX (Sunnyvale, CA)
- …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year Design ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA...Verification Engineer /Level II: $150,000.00 - $180,000.00/per year Your actual level and… more
- Amazon (Cupertino, CA)
- …design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area ... and back-end experts The ideal candidate will have a strong background in ASIC design, proficiency in SystemVerilog , and excellent analytical and problem-solving… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... ensure correct clock/reset/functional/DFT signal routing - As a key member of the ASIC design team, you will implement and deliver high performance, area and power… more
- Palo Alto Networks (Santa Clara, CA)
- …and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall ... design from specification through silicon bring-up, working with world-class verification and physical-design engineers to hit aggressive performance, power, and… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Deliver high-quality emulation and ... and adoption of best-in-class emulation methodologies to accelerate hardware verification and software development 4. Collaborate with Design, DV, validation,… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... + Experience in micro-architecture and RTL development (Verilog and/or SystemVerilog ), with a focus on high bandwidth data paths....high bandwidth data paths. + A deep understanding of ASIC design flows including RTL design, verification ,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... all stages of ASIC design flow including front end design and verification , DFT, and timing analysis + Strong team player with outstanding interpersonal skills.… more
- Google (Sunnyvale, CA)
- Senior ASIC Power Engineer , ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...with RTL (Register Transfer Level) design using Verilog or SystemVerilog . + Experience with low-power design or power reduction… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... be completed prior to joining Meta 7. 2+ years of hands-on experience in SystemVerilog /UVM methodology or C/C++ based verification 8. 2+ years experience in… more
- SpaceX (Sunnyvale, CA)
- Design Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system level… more
- Two95 International Inc. (Sunnyvale, CA)
- …5+ or more years of proven experience on ASIC / SoC / IP Verification . * Strong experience in SystemVerilog and UVM verification methodologies * ... Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog… more