- Cisco (Milpitas, CA)
- …leading FPGA devices and tools. **Preferred Qualifications** + Experience with UVM and/or VMM Verification methodology. + Experience with high-speed design ... networking system requirements, mapping them into functional blocks for FPGA implementation, working with the cross functional team to...ASR8000 routers. You will be a member of the FPGA team that designs control path FPGAs for the… more
- Broadcom (San Jose, CA)
- …verification tasks such as: verification environment development using modern verification techniques (System Verilog and UVM ); designing verification ... flows and DV methodologies + Strong working knowledge of object oriented verification languages (OVM, UVM , etc.), C/C++, Perl, and scripting skills. +… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join our team! **Responsibilities** + Perform pre-silicon ... verification for complex IP, including creating testplans, developing Universal Verification Methodology ( UVM ) components and environments from scratch,… more
- SpaceX (Sunnyvale, CA)
- Principal Design Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... goal of enabling human life on Mars. PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level… more
- Microsoft Corporation (Mountain View, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be ... verification methods + Experience in RTL design for FPGA or emulation + Experience in Assembly, startup code...with test plan definition + Substantial background in creating UVM Test Benches, developing tests, and debugging designs +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Verification Engineer ! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 ... partner with ASIC design engineers, IP architects and other verification engineers to formalize product features + Verify IP's...product features + Verify IP's using System Verilog and UVM + Build testbenches and enhance flows for automation… more
- Teledyne (Milpitas, CA)
- …+ Integrate PCIe IP cores, DMA engines, and custom protocol decoders. + ** Verification & Debug** + Build SystemVerilog/ UVM testbenches for block and system-level ... We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience,...for protocol capture, analysis, and emulation. You'll work on FPGA -based systems that decode and analyze High speed protocols… more
- Amazon (Sunnyvale, CA)
- …block. . Work with the verification team and participate in System level verification using test benches constructed using UVM , System C and DPI-C. . Ensure ... work at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC...solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your… more
- Amazon (Cupertino, CA)
- …as well as performance, power, area analysis and trade-offs - Experience with modern ASIC/ FPGA design and verification tools - Experience with SOC bring-up and ... change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation...Electrical Engineering or a related field - Knowledge of UVM and Matlab - Experience in communication theory, OFDM,… more