- Cadence Design Systems (San Jose, CA)
- Lead Applications Engineer DDR Design IP page is loaded## Lead Applications Engineer DDR Design IPlocations: SAN JOSEtime type: Full ... matter where you are in your career. As a Lead Technical Presales Engineer , you will use...standards to architect memory solutions for customers using Cadence DDR IP. This role offers the benefit of both… more
- Arm Limited (San Jose, CA)
- …of the future! Job Overview: We are looking for a Principal UEFI Firmware Design Engineer to lead and drive the development of UEFI firmware across server and ... roadmap, and execution of next-generation platform management firmware. Responsibilities: Lead the architecture, design, development, and deployment of UEFI-based… more
- Array Labs Inc. (Palo Alto, CA)
- …spans the range of radar, communications, power management and processing subsystems. As a lead engineer , you will own the design of hardware solutions that will ... is to provide "lidar-like" 3D data and imagery from space, serving critical applications for both commercial and defense customers. This is a deep tech challenge… more
- Google Inc. (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , AI Infrastructure, TPU corporate_fare Google place Sunnyvale, CA, USA Apply Bachelor's degree in Electrical Engineering, ... in technical leadership or management. Experience in PCIe, Double Data Rate ( DDR ), Ethernet, Universal Serial Bus(USB), Serial Peripheral Interface (SPI) etc. About… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a difference and be challenged? Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different ... smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence,...standards to architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob ... smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence,...Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and… more
- NVIDIA (Santa Clara, CA)
- …and understand the world. NVIDIA is seeking a Senior Cloud Service Provider (CSP) Application Engineer to join our team. In this role, you will collaborate ... the overall engineering organization. You will have the opportunity to help lead critical GPU solutions into the fastest growing markets including artificial… more
- Oracle (Santa Clara, CA)
- …West Coast Hardware Development_** _organization seeks to add a Principal FPGA Electrical Engineer to work with our FPGA, electrical, mechanical, SI and power teams ... team with full ownership responsibilities!_ _As an Electrical Design Engineer focusing on FPGA design, you will be responsible...test plans._ + _Mentor Junior Engineers._ + _Perform and lead Lab debug of HW/FPGA problems._ + _Contribute to… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our mission is backed by a massive hardware infrastructure. Our ... cutting-edge data centers affecting billions of users. **Required Skills:** Hardware Engineer Responsibilities: 1. Work with local and remote teams and suppliers,… more
- Google (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision ... in technical leadership or management. + Experience in PCIe, DDR , Ethernet, USB, SPI, etc. **About the job** As...SPI, etc. **About the job** As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
- Google (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , AI Infrastructure, TPU _corporate_fare_ Google _place_ Sunnyvale, CA, USA; Kirkland, WA, USA **Advanced** Experience owning ... technical leadership or management. + Experience in PCIe, Double Data Rate ( DDR ), Ethernet, Universal Serial Bus(USB), Serial Peripheral Interface (SPI) etc. **About… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …products-from chips to boards to systems-for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, ... Join our growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products...of high-performance IP related to memory protocols such as DDR , LPDDR, HBM, and GDDR, and to engage with… more
- Insight Global (Fremont, CA)
- Job Description The BIOS/UEFI Firmware Engineer is responsible for the architecture, design, development, and debugging of UEFI (Unified Extensible Firmware ... (SEC), Pre-EFI Initialization (PEI), and Driver Execution Environment (DXE). * Lead effort in hardware bring-up for new platforms, debugging complex… more
