- Advanced Micro Devices (San Jose, CA)
- …EXPERIENCE Proven experience in SoC architecture with Processor, Interconnects, and Memory subsystem . Expertise in AI accelerators, GPU integration, video ... SoCs, with Processor subsystems, Interconnect, AI, GPU, video processing pipelines, and memory systems. THE PERSON You are a seasoned SoC architect with deep… more
- AMD (San Jose, CA)
- …Experience Proven experience in SoC architecture with Processor, Interconnects, and Memory subsystem . Expertise in AI accelerators, GPU integration, video ... with a focus on Processor subsystems, Interconnect, AI, GPU, video processing pipelines, and memory systems. WHAT YOU DO: At AMD, our mission is to build great… more
- AMD (San Jose, CA)
- …clocking/reset, and silicon monitors. Collaborate with processor, interconnect, AI, and memory subsystem architects to ensure cohesive system-level design. ... ensuring seamless integration with processor subsystems, interconnect, AI accelerators, and memory systems. THE PERSON You are passionate about complex SoC… more
- Vivid Technology (San Jose, CA)
- …Partition functionality between analog, mixed‑signal, and digital domains to optimize performance , area, and power Develop subsystem ‑level digital specifications ... redefining the capabilities of imaging radar, delivering unprecedented resolution and performance . Their team is passionate about pushing the boundaries of sensor… more
- Arm Limited (San Jose, CA)
- …architecture integrating Arm IP and high-speed I/O subsystems to meet compute, memory , and interconnect performance targets. Partner with software, firmware, and ... Strong knowledge in areas such as heterogeneous compute, PCIe/CXL/UA Link subsystem design, security, caching, memory systems. Demonstrated communication and… more
- PageBolt WordPress (San Francisco, CA)
- The Role We're searching for a Staff Performance Modelling Engineer ( San Francisco) , to create and own the analytical and simulation models that steer OTPU ... Simulator: Design, build, and maintain a functional simulator of the OPTU subsystem and full pipeline. Performance Simulator: Design and maintain architectural… more
- PageBolt WordPress (San Francisco, CA)
- The Role We're searching for a Staff Performance Modelling Engineer to create and own the analytical and simulation models that steer OTPU architecture and ... Simulator: Design, build, and maintain a functional simulator of the OPTU subsystem and full pipeline. Performance Simulator: Design and maintain architectural… more
- Acceler8 Talent (San Francisco, CA)
- …design, report into the CDO and own large portions of verification execution at subsystem and chip‑level of a huge, high‑ performance data‑center chip. Base Pay ... Top-Level Design Verification Engineer - Datacenter AI Hardware Acceler8 Talent is...performance compute systems (CPUs, GPUs, accelerators), high‑speed interconnects, memory subsystems, and related components. Familiarity with emulation and… more
- CatchProbe Intelligence Technologies (San Francisco, CA)
- Senior Database Engineer (Elastic/Mongo/Hadoop) Senior Database Engineer (Elastic/Mongo/Hadoop) Workplace Type : Remote - Region : San Francisco, CA Job ... upgrades, support on MongoDB * Responsible for administration, maintenance, Performance analysis, and Capacity planning for Mongo dB/Elastic/Hadoop clusters. *… more
- Google (San Francisco, CA)
- …code developed by other developers to ensure strict adherence to real‑time performance constraints, memory optimization in embedded Linux environments, and ... Senior Software Engineer , Audio, Google Beam Join to apply for...with software design and architecture. Experience with real‑time audio subsystem design, implementation, or validation. Experience working with embedded… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Firmware Engineer for our Memory Subsystem Team! Widely considered to be one of the technology world's most desirable employers, NVIDIA ... in Artificial Intelligence, High- Performance Computing and Visualization. NVIDIA's SoC Memory Subsystem team is looking for curious, collaborative, and… more
- NVIDIA (Santa Clara, CA)
- …We are looking for a Firmware Engineer - New College Grad to join our Memory Subsystem Team! What you'll be doing: + Firmware Design & Execution: Design and ... Tune the DRAM interface and manage the memory subsystem configuration, including enhancements to initialization, functionality, performance optimization,… more
- NVIDIA (Santa Clara, CA)
- …MS degree in EE/CE or equivalent experience. + 8+ years of experience in memory subsystem architecture, design, and validation, with a strong focus on ... us today. NVIDIA Silicon Solutions Group seeks a hardworking engineer to join a silicon HW team. As a...desired. What you'll be doing: + Build roadmaps of memory system-level features to address low power, low noise,… more
- NVIDIA (Santa Clara, CA)
- …is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a ... Doing: + Analyze future DDR/LPDDR/HBM technologies to determine optimum performance , power, function and RAS in memory ...optimum performance , power, function and RAS in memory for Next generation SOC and Systems. + Collaborate… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to work with an experienced team focused on the development and support of high- performance IP related to memory protocols such as DDR, LPDDR, HBM, and ... in our world. We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up,...and recommendations to customers. + Analyze and resolve complex subsystem application or implementation issues. + Contribute to documentation,… more
- Amazon (Cupertino, CA)
- …successive debugging/root-causing memory failure - 5+ years of experience in memory / memory subsystem design Preferred Qualifications - Master's degree in ... leading memory standardization through JEDEC, CPU architecture, RAS, DDR Memory technology, system performance , security and troubleshooting - Repeated… more
- Meta (Menlo Park, CA)
- …power savings and enabling new platforms at Meta. **Required Skills:** Performance Engineer , Low-Level Libraries Responsibilities: 1. Develop and optimize ... years of professional C/C++ experience 7. Knowledge of computer architecture, CPU and memory subsystem , and OS-level resource management 8. Experience using … more
- NVIDIA (Santa Clara, CA)
- …etc. + In-depth expertise with CPU/GPU architecture fundamentals, especially memory subsystem . + Domain expertise in high performance databases, ETL and data ... NVIDIA is currently seeking a Senior Developer Technology Engineer for High- Performance Databases! Would you... Databases! Would you enjoy researching new algorithms and memory management techniques to accelerate databases on modern computer… more
- NVIDIA (Santa Clara, CA)
- …etc. + In-depth expertise with CPU/GPU architecture fundamentals, especially memory subsystem . + Domain expertise in high performance databases, ETL, data ... time to join our team! NVIDIA is currently seeking a Developer Technology Engineer for High- Performance Databases! Would you enjoy researching new algorithms and… more
- Renesas (San Jose, CA)
- …Chip architecture, design, and integration: MCU and peripherals, embedded flash and SRAM memory subsystem , on-chip bus system, DMA and interrupt system + Digital ... Principal Digital Engineer Job Description This is an opportunity to...an opportunity to join Renesas Infrastructure and Mixed-Signal Division, Memory Interface Product Line. You will join the team… more
