- Advanced Micro Devices (Santa Clara, CA)
- …computing hardware used in large‑scale AI and machine learning applications. Driving power methodology for AI‑specific hardware components (like tensor cores and ... within strict power and thermal limits, which is critical for both data center and gaming applications. Power Optimization: Estimate and analyze power… more
- Analog Devices, Inc. (San Jose, CA)
- Principal Engineer , eFPGA Place and Route page is loaded## Principal Engineer , eFPGA Place and Routelocations: US, CA, San Jose, Rio Roblestime type: Full ... Possible. Learn more at and on and .# **Principal Engineer , eFPGA Place and Route The Group:**The charter of...suite (optimization, place and route, bitstream), reporting (area, timing, power ) and debug capabilities. This software suite will be… more
- Lattice (San Jose, CA)
- …LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer , you will have an opportunity to learn and train yourself on how to ... the FPGA. And also, you will be able to acquire knowledge on process/ methodology required for validating certain IPs from planning to completion. While you are… more
- Analog Devices, Inc. (San Jose, CA)
- Engineer , Semi Packaging Engineering page is loaded## Engineer , Semi Packaging Engineeringlocations: US, CA, San Jose, Rio Roblestime type: Full timeposted on: ... at and on and .**Employer:** Analog Devices, Inc.**Job Title:** Engineer , Semi Packaging Engineering**Job Requisition:**R258209**Job Location:** San Jose, California**Job… more
- Conductor (San Jose, CA)
- …design methodology involving RTL development for complex control and data path IPs Experience in designing Memory Controller, NOC, Interconnect IP Experience ... using Verilog, System Verilog and HLS Optimize the IP for performance, power , and area by leveraging advanced design techniques such as pipelining, parallelism,… more
- Google Inc. (Mountain View, CA)
- …Manage timing and power consumption of the design. Contribute to design methodology , libraries, and code review. Define the physical design related rule sets for ... Senior Silicon Physical Design Engineer , TPU, Google Cloud Apply Bachelor's degree in...clock/voltage domain crossing, Design for Testing (DFT), and low power designs. Experience with System on a Chip (SoC)… more
- Altera (San Jose, CA)
- …## **Job Description: Job Summary:**Altera is seeking a passionate and driven engineer to join our Design Automation team, focusing on developing and enhancing ... improve physical design processes such as placement, routing, timing closure, and power optimization.* Evaluate and integrate new EDA tools and methodologies to… more
- NVIDIA Corporation (Santa Clara, CA)
- We are now looking for a Senior Signal & Power Integrity Engineer !NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... GDDR6, LP5X and other interfaces.* Constant improvements of SI models using data from lab measurements and/or modelling tool/ methodology updates.* Substrate and… more
- Intel Corporation (Santa Clara, CA)
- …cutting-edge products powering a wide range of AI applications, from edge devices to data center accelerators. If you are an engineer with strong technical and ... # **Welcome!**## .Senior Design Engineer - AI SoC Development page is loaded##...across various logic design aspects ranging from RTL to timing/ power convergence.You will apply various strategies, tools, and methods… more
- NVIDIA Corporation (Santa Clara, CA)
- …and reduce power consumption of NVIDIA GPUs.As a member of the Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC ... objective functions, and learning algorithms.* Develop methodologies to estimate data movement power /energy accurately.* Correlate the predicted energy… more
- Mythic, Inc. (Palo Alto, CA)
- …Mythic Analog Compute Engine (Mythic ACE (TM) ) to deliver revolutionary power , cost, and performance that shatters digital barriers preventing AI innovation at ... more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has...This Role We are seeking a Director / Principal Engineer of Digital Design Verification to provide technical and… more
- Snap Inc. (Palo Alto, CA)
- …glasses that bring augmented reality to life. We're looking for a RF Test Engineer to join the Spectacles team!What you'll do:* Develop test solutions (both hardware ... principles and measurements at the physical layer* Understanding the test methodology for wireless standards such as WiFi, Bluetooth, BLE, cellular, etc.*… more
- Stefanini, Inc (Palo Alto, CA)
- …strategic staffing to enterprises around the world. We are looking for a Connectivity Engineer to be an on‑site expert at our client's factory, serving as the ... and performance Work with network, telecommunication, on prem server infra and data cabling providers on different levels of operational issues Lead / Participate… more
- Apple Inc. (Cupertino, CA)
- … power analysis and optimization tasks. Exploring new methodologies to analyze power data , creating power metrics to identify optimization opportunities, ... SoC Power Analysis and Optimization Engineer Cupertino,...across IPs. Researching machine learning approaches to optimize SOC power , including training data preparation, ML-based solutions… more
- Google Inc. (Sunnyvale, CA)
- Physical Design Engineer , 3D Technology, PhD, University Graduate Experience driving progress, solving problems, and mentoring more junior team members; deeper ... tapeouts. Experience with programming/scripting (TCL, Python, or Perl). Expertise with Power , Performance, and Area (PPA) design trade-offs and optimizations in… more
- C3 AI (Redwood City, CA)
- …for the enterprise. Learn more at: C3 AI C3 AI is seeking a Senior Solution Engineer . As a Solution Engineer you will engineer full‑stack AI‑driven web ... (GCP, AWS, Azure) Understanding of SQL and NoSQL databases Proficiency in data structure and algorithm design and implementation Proficiency in time‑series data… more
- TigerGraph (Redwood City, CA)
- …TigerGraph is a platform for advanced analytics and machine learning on connected data . TigerGraph's core technology is the only scalable graph database for the ... personalized offers with recommendation engines powered by TigerGraph. TigerGraph reduces power outages by optimizing the energy infrastructure for 1 billion people.… more
- Google Inc. (Sunnyvale, CA)
- …Google chip product design pipeline. This contributes to successful chip deployment in data centers, ensuring the best optimized PPA ( Power , Performance, Area) ... of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the… more
- Meta (Sunnyvale, CA)
- …with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer , you will be part of ... Summary: Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals… more
- Upstart (San Mateo, CA)
- …Personal Loan Underwriting team is focused on leveraging machine learning to power Upstart's underwriting models. This team builds the underwriting model which ... numerous challenging problems to solve. As a Machine Learning Engineer , PL UW at Upstart, you will collaborate with...UW at Upstart, you will collaborate with Research Scientists, Data Scientists, and other engineering departments. Your work will… more
