• Principal Design Verification Engineer…

    SpaceX (Sunnyvale, CA)
    … test plan, development, and milestones from beginning to end + Contribute towards pre - silicon verification , chip bring-up and post- silicon validation + ... Principal Design Verification Engineer ( Silicon Engineering) Sunnyvale, CA...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block… more
    SpaceX (01/06/26)
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  • Senior Silicon Bringup and Test Lead,…

    Google (Fremont, CA)
    …investigative, communication and teamwork skills. **About the job** We are seeking a Silicon Pre -to-Post Validation Lead with experience in writing verilog code ... dual-capacity role, you will be responsible for both the silicon emulation ( pre silicon ) to...require an in-depth understanding of Register-Transfer Level (RTL) design, digital verification , and all aspects of micro… more
    Google (01/07/26)
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  • Lead Post- Silicon Validation Engineer

    NVIDIA (Santa Clara, CA)
    …LPDDR and their timing, analog, and digital requirements. + In Pre - Silicon phase, work with the design and verification teams to define features required ... We are seeking Lead Post- Silicon Validation Engineer within the GPU Engineering Team...In this role, you will manage and help lead post- silicon bringup, characterization, and productization of the memory system… more
    NVIDIA (11/06/25)
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  • ASIC Verification - Team Lead

    Microsoft Corporation (Santa Clara, CA)
    …exciting technologies including PCIe, DDR, processors and custom accelerators. **Responsibilities** ** Pre - Silicon Verification ** Improves verification ... engineers across geographic regions towards project completion. + Develop comprehensive pre - silicon verification test plans based on design specifications… more
    Microsoft Corporation (01/09/26)
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  • Principal ASIC Design Verification Engineer…

    Palo Alto Networks (Santa Clara, CA)
    …in software, architecture, design, and verification teams to create comprehensive pre - silicon verification plans across simulation, emulation, and formal ... mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world...will work on diverse platforms including simulation, emulation, formal verification , and silicon validation. We expect office-based… more
    Palo Alto Networks (12/10/25)
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  • Director, Hardware Engineering

    Cisco (San Jose, CA)
    …4) Guide the development and deployment of automated test solutions for pre - silicon emulation, post- silicon bring-up, device characterization, reliability ... yield improvement. + Multi-functional Collaboration: 1) Partner closely with silicon architecture, ASIC design, verification , software, reliability,… more
    Cisco (12/02/25)
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  • Sr. Technical Program Manager, ASIC

    Amazon (Sunnyvale, CA)
    …phases of pre - silicon such as architecture, front end design, pre - silicon verification , FPGA prototyping, Emulation, Physical design, BROM, FW, ... should have the experience of working through the various design phases of Silicon development from architecture definition, RTL design, Verification , IP design,… more
    Amazon (11/27/25)
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  • Senior Manager, System Level Testing

    Cisco (San Jose, CA)
    …solutions, test plans, and system validation workflows. + Lead system-level validation for pre - silicon and post- silicon phases using emulation, FPGA, and ... or if a sufficient number of applications are received. **Meet the Team** Cisco's Silicon One organization is redefining the future of networking silicon , and we… more
    Cisco (12/03/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …familiarity in back-end chip design, Timing, CDC flows is a plus + Strong Pre /Post Silicon debugging, analytical and independent problem solving ability. + Must ... (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification , timing closure, ATE pattern bringup. . You will also drive/push… more
    Broadcom (11/19/25)
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  • Staff DFT Engineer

    Broadcom (San Jose, CA)
    …optimal DFx solutions + Support chip teams on IP DFT integration, pattern verification and ATE bring-up + Participate in silicon bring-up, characterization, and ... in JTAG standards (1149.1 and 1149.6, 1687) and boundary scan + Strong Pre /Post Silicon debugging, analytical and independent problem solving ability + Strong… more
    Broadcom (11/26/25)
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  • ASIC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    …synthesis/timing clean design. + Collaborate and coordinate with architects, other designers, pre - and post- silicon verification teams, synthesis, timing and ... system, interrupt controllers, and DMA engines. + Architect features to help silicon debug and support post- silicon validation activities. What we need… more
    NVIDIA (01/10/26)
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  • Senior ASIC Power Engineer, ML Accelerators

    Google (Sunnyvale, CA)
    …and designs. + Experience in power modeling, measurement, and correlation across the pre - and post- silicon phases. + Understanding of modern power and thermal ... management techniques at both the silicon and system levels (including DVFS, Turboing, Thermal Management,...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs,… more
    Google (12/30/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Support post- silicon validation activities. + Work with architects, other designers, pre - and post- silicon verification teams, synthesis, timing and ... and RTL development of complex designs in Verilog. + Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and… more
    NVIDIA (01/10/26)
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  • ASIC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    … validation activities. + Collaborate and coordinate with architects, other designers, pre - and post- silicon verification teams, synthesis, timing and ... and/or caches. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis and timing analysis. + Exposure to Digital systems… more
    NVIDIA (11/25/25)
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  • Senior Software Engineer, CAD Automation

    NVIDIA (Santa Clara, CA)
    …What you'll be doing: + Work within a multi-functional team on various projects involving Pre - silicon and Post Silicon hardware design and related data + ... and creates opportunities for everyone to thrive in the digital future. Today, we're tapping into the unlimited potential...EDA tool and design collaterals to streamline design and verification workflows + Work closely with design engineers to… more
    NVIDIA (01/10/26)
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  • Principal FPGA Electrical Engineer

    Oracle (Santa Clara, CA)
    …and delivery of Oracle servers based on the latest high-end server-grade merchant silicon ._** _The systems delivered are integrated as building blocks for some of ... **_Job Requirements:_** + _Proficiency in FPGA architecture, design, modeling, simulation, and verification ._ + _Expertise in Verilog._ + _System Verilog a plus and… more
    Oracle (11/25/25)
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  • Sr Engineer HW/SW (System Architecture)

    Palo Alto Networks (Santa Clara, CA)
    …modeling of new architectures and designs + Architectural models, test infrastructure, pre - and post- silicon validation + In-house Processor Tool Chain ... mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world...Simulator + Infrastructure to support ASIC team development and verification + ASIC microcode and device driver development **Your… more
    Palo Alto Networks (11/21/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …FPGA-Based Prototyping product which is used by leading CPU/GPU/HyperScaler companies for pre - Silicon software validation of their SOC's. You will develop new ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement new algorithm and enhancements in C/C++ based… more
    Cadence Design Systems, Inc. (12/30/25)
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