- Theconstructsim (Milpitas, CA)
- A leading technology firm located in Milpitas, California, is seeking a Physical Design Engineer with expertise in ASIC development to manage design ... tasks such as floorplanning and routing. Candidates should possess a BSEE with at least 9 years of experience and strong skills in EDA tools like ICC2/Innovus along with proficiency in scripting languages. This role offers an attractive compensation package… more
- Google Inc. (Sunnyvale, CA)
- …a specific focus on TPU architecture and its integration within AI/ML‑driven systems. As an ASIC Physical Design Engineer, you will collaborate with RTL, ... related field, or equivalent practical experience. 7 years of experience with physical design (eg from RTL to GDSII, including key stages like floorplanning,… more
- Cornelis Networks, Inc. (San Jose, CA)
- …design coverage. Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure. Support post-silicon validation, ... relevant to adapters and switches. Familiarity with timing closure and modern physical design methodologies. Proven ability in system-level debug and root… more
- Broadcom Inc. (San Jose, CA)
- …C++.* Demonstrate the ability to work through technology challenges and physical implementation issues associated with high-performance design implementations.* ... please Sign-In before you apply.**## **Job Description:**Looking for a design engineer to work on challenging high speed ...design engineer to work on challenging high speed design of complex modules for Ethernet and PCIE cores… more
- Cisco Systems (San Jose, CA)
- …lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Google Inc. (Mountain View, CA)
- Senior Silicon Physical Design Engineer, TPU,... design in SoC or multiple-cycles of SoC in ASIC design . Experience with layout verification and ... centers. You will collaborate with members of architecture, verification, power and performance, physical design etc. to specify and deliver high quality designs… more
- CareerArc (San Jose, CA)
- …future of AI and beyond. Together, we advance your career. THE ROLE: The Senior Manager, DC GPU Advanced Forward Deployment and Systems Engineering is a leadership ... position designed to optimize the design , roll‑out and post‑rollout management of AI/ML Fabrics. The...datacenter deployment. THE PERSON: This position is for a Senior Manager, DC GPU Advanced Forward Deployment and Systems… more
- NVIDIA Corporation (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL.* Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements.* Engage with...and DFT teams.* Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- Cisco Systems (San Jose, CA)
- …are the Service Provider (SP) Mechanical and Thermal team responsible for the design of Cisco's best high‑performance, provider class routers, the Cisco 8000 series. ... The Cisco 8000 series utilizes Cisco's revolutionary Silicon One ASIC that delivers unmatched performance and density with feature‑rich functionality. We are… more
- Cisco Systems (San Jose, CA)
- Meet the Team Cisco Silicon One is the center of Cisco's ASIC design and is driving the development of next-generation network devices for the 5G and AI era. Our ... within a stable and leading corporate environment, and our design center hosts all silicon Hardware and Software development...Python to develop software on the NPU. As a senior technical leader, you will be part of requirement… more
- SPACE EXPLORATION TECHNOLOGIES CORP (Sunnyvale, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS Pay range: ASIC Design Engineer/ Senior : $170,000.00 - $230,000.00 per year. Your actual ... this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- Hewlett Packard Enterprise Development LP (Sunnyvale, CA)
- …technology company in Sunnyvale, California, seeks an experienced engineer to join the Physical design team. The role involves optimizing floorplan and timing ... closure while validating designs with the Verification team. Candidates must have a Bachelor's degree in Electrical Engineering and over 10 years of experience, alongside strong analytical skills and proficiency in Verilog/System Verilog. This position… more
- SPACE EXPLORATION TECHNOLOGIES CORP (Sunnyvale, CA)
- …will work alongside world‑class cross‑disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this ... work extended hours and weekends as needed Compensation & Benefits Pay range: Design Verification Engineer / Senior : $170,000.00 - $230,000.00 per year. Your… more
- Intel Corporation (Santa Clara, CA)
- # **Welcome!**## . Senior Design Engineer - AI SoC Development page is loaded## Senior Design Engineer - AI SoC Developmentlocations: US, California, ... and maintain timing constraints for IP blocks; provide guidance and support to physical design teams for synthesis, timing closure, and formal equivalence… more
- NVIDIA Corporation (Santa Clara, CA)
- …Domain & Technical Expertise: Deep knowledge in EDA/VLSI (eg, synthesis, physical design , verification, timing, reliability, or CAD algorithms) combined ... Senior Research Scientist, Design Automation Research...methods.* Apply deep learning and GPU computing to improve ASIC and VLSI design tool flows.* Collaborate… more
- NVIDIA Corporation (Santa Clara, CA)
- …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... Engineers, and Physical Design teams to study and implement...interest in energy-efficient GPU designs.* Familiarity with Verilog and ASIC design principles is a plus.* Ability… more
- Advanced Micro Devices (Santa Clara, CA)
- …future of AI and beyond. Together, we advance your career. THE ROLE: The Senior Manager, DC GPU Advanced Forward Deployment and Systems Engineering is a leadership ... position designed to optimize the design , roll‑out and post‑rollout management of AI/ML Fabrics. The...datacenter deployment. THE PERSON: This position is for a Senior Manager, DC GPU Advanced Forward Deployment and Systems… more
- Advanced Micro Devices (Santa Clara, CA)
- …hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ... ASIC and hardware bring up Debugging/fix existing issues and...age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party… more
- Advanced Micro Devices (Santa Clara, CA)
- …Power Optimization: Estimate and analyze power consumption at various stages of chip design (architecture, RTL, physical design ). Analysis and modeling: ... analysis efficiency. Collaboration: Working with other teams, including RTL, Architecture, Physical Design , Emulation, software, firmware to ensure power… more
- Google (Sunnyvale, CA)
- Senior ASIC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... focus on TPU architecture and its integration within AI/ML-driven systems. As an ASIC Physical Design Engineer, you will collaborate with RTL, Design … more
