• Senior IC Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …In collaboration with R&D, provide in-depth technical assistance to help support advanced verification flows and AI/ML applications to secure design wins - ... in writing scripts (Perl, Python or Tcl) Strong software, HDL design and verification skills Ability to quickly analyze verification environments and… more
    Cadence Design Systems, Inc. (11/21/25)
    - Save Job - Related Jobs - Block Source
  • Senior /Principal IC Design

    Insight Global (Milpitas, CA)
    …leading provider of high-performance analog and mixed-signal semiconductor solutions is looking for a Senior or Principal IC Design Engineer to join their ... signal integrity and jitter performance targets Own block-level schematic design and verification in Cadence or Synopsys...and Requirements - 1225 years of experience in analog/mixed-signal IC design - Strong background in BiCMOS… more
    Insight Global (09/09/25)
    - Save Job - Related Jobs - Block Source
  • Sr. Principal Analog IC Designer

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design ... microelectronics . Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (≥16Gb/s) and in technologies ≤16nm . Excellent… more
    Cadence Design Systems, Inc. (09/12/25)
    - Save Job - Related Jobs - Block Source
  • ASIC FPGA Design and Verification

    The Boeing Company (Mountain View, CA)
    …Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior ) to join us as part of ... SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to...enterprise. This is a unique time where we're hiring design and verification engineers at every level… more
    The Boeing Company (11/13/25)
    - Save Job - Related Jobs - Block Source
  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …sub-micron process (especially in FINFET) + Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation ... senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers...characterization. + Help by defining circuit requirements and complete design from schematic, layout, and verification to… more
    NVIDIA (11/07/25)
    - Save Job - Related Jobs - Block Source
  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …sub-micron process (especially in FINFET) + Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation ... senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers...characterization. + Help by defining circuit requirements and complete design from schematic, layout, and verification to… more
    NVIDIA (10/04/25)
    - Save Job - Related Jobs - Block Source
  • Senior Hardware Design Engineer…

    General Motors (Mountain View, CA)
    …analysis, PCB layout, bring-up, debug, signal integrity and power integrity (SI/PI), design verification test (environmental and EMC), to manufacturing support ... of our vehicle displays hardware. In this role, the Senior Hardware Design Engineer - Display Development... design and PCB layout + Support new IC design /development strategic to new display designs… more
    General Motors (10/30/25)
    - Save Job - Related Jobs - Block Source
  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …speed transceivers and high frequency PLLs + Design , simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/mask designers, ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
    NVIDIA (10/21/25)
    - Save Job - Related Jobs - Block Source
  • Senior Photonics CAD Engineer

    NVIDIA (Santa Clara, CA)
    … problems across different technology nodes. + Drive efficiency improvements in design verification , physical extraction, custom rule writing (DRC/LVS), and ... join us today! We are now looking for a Senior Photonics CAD Engineer . We are part of...experience) + Minimum 5 years of experience in physical design engineering or photonic IC development, including… more
    NVIDIA (11/05/25)
    - Save Job - Related Jobs - Block Source
  • Principal Product Definition Engineer

    Power Integrations (San Jose, CA)
    …topology and product ideas using modern simulation tools and discrete emulation of circuits prior to actual IC design . + Support to the IC design team to ... meets system requirements. + Review and approval of the IC design prior tape-out. + Active participation... design prior tape-out. + Active participation in design verification testing and characterization of first… more
    Power Integrations (09/01/25)
    - Save Job - Related Jobs - Block Source
  • Senior Calibre CAD Engineer

    NVIDIA (Santa Clara, CA)
    …and maintaining CAD tools used by IC designers including Virtuoso, IC -Manage, DRC/LVS verification tools, extractions, and spice simulation tools. + Work ... expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts...background with an understanding of circuits, layouts and VLSI design . We are looking for someone who enjoys working… more
    NVIDIA (09/01/25)
    - Save Job - Related Jobs - Block Source
  • Senior Component Engineer

    Palo Alto Networks (Santa Clara, CA)
    …of industry best practices for component and product level qualification and design verification testing (DVT practices, HALT, HASS, etc.). + Experience ... great outcomes. **Your Career** We are seeking an experienced and highly motivated Senior Component Engineer to join our exciting, fast growing company and reports… more
    Palo Alto Networks (10/16/25)
    - Save Job - Related Jobs - Block Source
  • Physical Design Engineer

    Broadcom (San Jose, CA)
    …and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and ... you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer. In...to foundries and solid understanding of supply chain for IC Product development.** + **Scripting experience with Perl, Python,… more
    Broadcom (09/26/25)
    - Save Job - Related Jobs - Block Source