- Altera (San Jose, CA)
- Senior FPGA Compiler Software Engineer page is loaded Senior FPGA Compiler Software Engineer Apply locations San Jose, California, United States time ... Actively researching & developing novel optimization algorithms for our FPGA CAD software tools, including timing -driven analytic placement, detailed placement,… more
- Apple Inc. (Santa Clara, CA)
- A leading technology company in Santa Clara is seeking an experienced CAD Engineer to design and analyze cutting-edge semiconductor technology. You will work on ... ensuring seamless integration. The ideal candidate has over 10 years of experience in CAD , along with strong coding skills in C, Python, Perl, or Tcl. Competitive… more
- Altera (San Jose, CA)
- …research & development efforts to explore novel optimization algorithms for our FPGA CAD software tools, including global and detailed routing as well as state of ... modules of the Routing and Retiming engine from device modeling to timing closure to runtimeIdeal candidates exhibit the following behavioral traits:* Intellectual… more
- Synopsys, Inc. (San Jose, CA)
- …and business acumen to every task. You are comfortable interacting with senior business leaders and stakeholders, and your professionalism enhances the customer ... an engineering software environment, with hands‑on use of ANSYS or similar CAE/ CAD /EDA tools. Expertise in signal and power integrity simulation analysis, including… more
- OVT group (Santa Clara, CA)
- …along with the block level, transistor level schematic simulations. Work with system timing designer to define sensor readout timing control. Perform the block ... transistor level layout design and optimize sensor array readout circuits using CAD tools like Cadence Virtuoso and Calibre. Collaborate with verification, process,… more
- NVIDIA (Santa Clara, CA)
- …Methodology organization is driving the next generation of AI-assisted timing and constraint sign-off, integrating advanced analytics, orchestration frameworks, and ... closure across multi-billion transistor chips. We are seeking an Applied AI Engineer to lead end-to-end solution development - spanning data generation, model… more
- Google (Mountain View, CA)
- Senior Silicon CAD Engineer ...Silicon SoC projects (eg, RTL generation, design verification, AI-enabled CAD , design QA, timing , and low power). ... 5 years of industry experience in VLSI design or CAD flow development. + Experience with front-end design tools...10 years of experience in software development or front-end CAD . + Experience with ML algorithms and AI application… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies ... flow, and tool for high-speed designs, with focus on CAD and automation. + Develop custom flows for validating...+ Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Methodology/ CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN METHODOLOGY/ CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Microsoft Corporation (Mountain View, CA)
- …engineers so that they can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the development and ... with design teams across Microsoft Silicon to deliver scalable, high-performance CAD solutions. #azurehwjobs #SCHIE **Responsibilities** - Be part of a central… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV),Cadence (Innovus, Tempus, SeaHawk ) and Mentor… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... for micro-architecture and design including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using the… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and...to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 5+… more
- CDM Smith (San Jose, CA)
- …and/or soil excavation projects, including an ability to follow direction from a senior engineer with minimal continual oversight * Experience performing slope ... **Job Description:** CDM Smith's Environmental Services Group is seeking an Engineer , Scientist or Geologist with a.) experience modeling contaminant transport… more
