- Apple Inc. (Cupertino, CA)
- …center of the action on new silicon product development for Apple's groundbreaking SoC 's! Apple seeks a Silicon Engineering Program Manager (EPM) within ... delivery. You will help lead and drive programs involving silicon debug , bring-up and validation for pioneering...Qualifications SOC / VLSI Chip Design, Post Silicon Validation or Product Engineering experience Relevant… more
- Samsung Electronics GmbH (Mountain View, CA)
- …SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership) Perform high‑level performance ... Senior Engineer, SoC Architect - Memory Subsystem Senior Engineer, ...silicon bring‑up and product teams to verify and debug the proposal and its delivered performance Collaborate across… more
- Samsung Electronics GmbH (Mountain View, CA)
- …SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership) Perform high-level performance ... The Samsung Research America SOC Architecture Lab provides innovative SoC ...silicon bring-up and product teams to verify and debug the proposal and its delivered performance Collaborate across… more
- Cadence Design Systems (San Jose, CA)
- …Serve as the primary technical contact for post- silicon bring-up and debug of Memory IP subsystems.* Support customer SOC and system integration, ... world.We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up, debug , and production ramp for advanced memory IP solutions. This… more
- Analog Devices, Inc. (San Jose, CA)
- …Performing hardware-software co-design, such as the PPA analysis/optimization and the debug environment.* Developing the softlogic library (a library of RTLs that ... Integrating the eFPGA IP in the chip with the SoC design team.* Interacting with the eFPGA verification and...to see: Master's degree (or equivalent experience) in Electrical Engineering or related fields.* Knowledge of system-level protocols and… more
- Qualcomm (Santa Clara, CA)
- …Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a "CPU Silicon Bring up and Validation Engineer" ... SoC using the Custom CPUs - from first Silicon through to productization. Roles and Responsibilities: Work with...software teams to plan CPU bring up. Triage and debug failures on Silicon . Develop test contents… more
- Intel Corporation (Santa Clara, CA)
- …closure, and formal equivalence checks* Drive silicon bring-up and post- silicon validation, including debug and performance analysis* Mentor junior engineers ... # **Welcome!**## .Senior Design Engineer - AI SoC Development page is loaded## Senior Design Engineer - AI SoC Developmentlocations: US, California, Folsom: US,… more
- Nutanix (Santa Clara, CA)
- …Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a "CPU Silicon Bring up and Validation Engineer" ... SoC using the Custom CPUs - from first Silicon through to productization. Roles and Responsibilities Work with...software teams to plan CPU bring up. Triage and debug failures on Silicon . Develop test contents… more
- Qualcomm (Santa Clara, CA)
- **Company:** Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > SoC Architecture **General Summary:** As a SoC Performance ... against RTL behavior, prototype ideas and help productize performance/power features for future SoC designs. Minimum requirements * 2+ years of experience in SoC … more
- TechDigital Group (Mountain View, CA)
- Top Hard Skills Required Proficient in defining and developing unit and IP/ SoC level test benches using SystemVerilog and VMM/OVM/UVM (5+ YOE) Experience with high ... YOE) Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes (5+...is less important, however a Bachelor's degree in Electrical Engineering , Computer Engineering , Computer Science, or related… more
- Apple Inc. (Santa Clara, CA)
- …Machine Learning and Design of Experiments. Prior exposure to DFT, Tetramax, Tessent, silicon debug , or semiconductor processing is a plus. At Apple, base ... CAD Engineer, Silicon Learning and Static Timing Analysis Santa Clara,...design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip ( SoC ) working on leading edge semiconductor technology nodes where… more
- Advanced Micro Devices (Santa Clara, CA)
- …of the team. KEY RESPONSIBILITIES: Integrate AMD internal IPs RTL/DV environments into SoC Debug function/performance of Graphics, Display, SMU IPs Engage with ... shape the future of AI and beyond. Together, we advance your career. THE ROLE: The SOC RTG team develops leading edge discrete graphics SOCs. The team owns SOC … more
- d-Matrix (Santa Clara, CA)
- …can look forward to: Work on chip(s) bring up, validation and debug of cutting-edge interference accelerator chiplet. This includes cutting-edge technology: test and ... Do you have the following qualifications and Experience? BS/MS in Electrical/Computer Engineering with 5 + years industry experience working with high performance … more
- Apple Inc. (Cupertino, CA)
- A leading technology company is seeking a Silicon Engineering Program Manager to oversee silicon program schedules and resolve technical issues critical to ... product development. Ideal candidates will have experience in SOC /VLSI chip design, strong leadership capabilities, and the ability to effectively communicate across… more
- Apple Inc. (Cupertino, CA)
- …of a bachelor's degree along with 3 years of relevant experience in silicon validation software engineering . Competitive pay and extensive benefits are offered. ... A leading technology company in Cupertino, California seeks a Silicon Validation Engineer to enhance Apple SoCs through rigorous testing and validation. You will… more
- Apple Inc. (Sunnyvale, CA)
- …will gain knowledge on Wireless protocols, FW-HW interactions, and complexities of multi-chip SOC debug architecture. As a Design Verification Engineer on our ... art Wireless SOCs. This position comes with responsibility for pre- silicon RTL verification of block and top-level SOC...block and top-level SOC , all aspects of SOC Design Verification engineering , and will enable… more
- Google Inc. (Sunnyvale, CA)
- … Debug specifications for complex next generation SoCs. In partnership with the Silicon Engineering team, you will also be responsible for diagnosing memory ... experience in DFT architecture, implementation, and verification for SoCs. Experience in silicon bring-up, debug , or validation of DFT features. Experience with… more
- Apple Inc. (Cupertino, CA)
- SoC DRAM Memory Subsystem Validation Engineering Program Manager Cupertino, California, United States Hardware Come and join the team that crafts Apple's ... define the next big thing that will surprise and delight the world! Description The SoC DRAM Memory Subsystem Validation and Debug Program Manager will drive the… more
- Apple Inc. (Cupertino, CA)
- SoC Display Subsystem Image Quality Engineering ... SoC Display IP/Driver IC development, validation or debug - Silicon / Software / System ... add to the development of new Apple SoCs and products year after year!The SoC Display Subsystem Image Quality Engineering Program Manager (EPM) will be leading… more
- Apple Inc. (Sunnyvale, CA)
- …bring‑up and debug of wireless PHY and RF systems on SoC platforms. Strong understanding of OFDM and MIMO‑based wireless systems across both baseband ... Wireless System Bringup and Debug Engineer At Apple, we work every single...physical layer systems for next‑generation wireless SoCs - from pre‑ silicon stage to product launch in Apple devices. As… more
