• Ayar Labs (San Jose, CA)
    Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and ... to completion with limited supervision and guidance. Essential Functions: Develop verification methodology and testbenches for digital and mixed-signal blocks… more
    Upward (08/05/25)
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  • ASIC Design Verification

    Google (Sunnyvale, CA)
    ASIC Design Verification and Methodology Engineer, Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, ... by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer, you will be the catalyst for change,… more
    Google (10/28/25)
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  • Senior ASIC Verification Engineer…

    NVIDIA (Santa Clara, CA)
    …years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the...working across many NVIDIA teams from software, to architecture, design , methodology , and more. The GPU is… more
    NVIDIA (10/10/25)
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  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
    Meta (09/04/25)
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  • ASIC Engineer, Network Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Network Design Verification ...cycles 9. 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 8+… more
    Meta (09/30/25)
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  • ASIC Design Verification

    Google (Mountain View, CA)
    ASIC Design Verification Engineer, Devices and Services _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... unparalleled performance, efficiency, and integration. As an Application-Specific Integrated Circuit ( ASIC ) Design Verification Engineer, you will be… more
    Google (10/04/25)
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  • Staff ASIC Design

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer, Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes ... at RTL and GLS level using SystemVerilog or C/C++ or Universal Verification Methodology (UVM). + Experience with system-level architecture, scripting languages,… more
    Google (10/01/25)
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  • ASIC Verification Engineer - New…

    NVIDIA (Santa Clara, CA)
    …(or equivalent experience) + Strong communication and problem solving skills + Exposure to ASIC design , ASIC verification and computer architecture, + ... NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the...working across many NVIDIA teams from software, to architecture, design , methodology , and more. The GPU is… more
    NVIDIA (10/27/25)
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  • ASIC Engineer, Formal Verification

    Meta (Sunnyvale, CA)
    …ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards creating a first-pass ... Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the...equivalent practical experience 9. 8+ years of experience in Design Verification 10. 5+ years of experience… more
    Meta (10/20/25)
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  • Sr. ASIC Design Verification

    Amazon (Sunnyvale, CA)
    …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure functional ... you will: . Implement a state of the art verification environment to facilitate testing of the RTL against...correctness . Work with the design and communication systems team and participate in system… more
    Amazon (09/13/25)
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  • Senior ASIC Verification Engineer,…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, ... the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will...Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent… more
    NVIDIA (10/08/25)
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  • Senior Video ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …with the architecture team to define feature additions and roadmap. + Work with the ASIC team to drive design methodology to continuously improve design ... We are now looking for a Senior Video ASIC Design Engineer! NVIDIA has been...with verification engineers, IP architects, and other ASIC design engineers to formalize product features… more
    NVIDIA (10/15/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... will play a critical role in shaping the architecture, design , implementation, and verification of DFT IPs...JasperGold is a plus. + Deep expertise in DFT design , methodology , and implementation. + Familiarity with… more
    NVIDIA (10/25/25)
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  • Nvidia 2026 Internships: Hardware ASIC

    NVIDIA (Santa Clara, CA)
    By submitting your resume, you're expressing interest in one of our 202 6 Hardware ASIC Design Internships. We'll review resumes on an ongoing basis, and a ... areas could be required : + Digital Systems, Digital Design , VLSI Design , RTL Design...Power/Clock Distribution, Packaging, P&R and Timing Closure + Performance, Verification , and Emulation Methodology Depending on the… more
    NVIDIA (09/02/25)
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  • Sr. ASIC Manager, Annapurna Labs

    Amazon (Cupertino, CA)
    …Owns overall SOC quality and schedule - Drive design , implementation and verification closure - Own reviews and review methodology within the development - ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...and chip development methodologies ensuring robust, efficient, high quality design - Drivers methodology and flows with… more
    Amazon (09/30/25)
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  • ASIC Engineer, Implementation

    Meta (Sunnyvale, CA)
    …create IO budgets for various partition blocks. 12. Develop automation scripts and methodology for FE-tools. 13. Support design engineers, DV engineers, and ... "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run logic/physical synthesis using advanced… more
    Meta (09/20/25)
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  • Sr. CAD Engineer, ASIC

    Amazon (Sunnyvale, CA)
    …Develop, regress, and deploy digital front end flows including RTL static checks and design verification methodology - Develop, regress and deploy digital ... and implementation, including Lint, CDC, RDC, SDC - Familiar with digital design verification methodology and debugging techniques - Familiar with basic… more
    Amazon (09/05/25)
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  • Physical Design Flow and Methodology

    Google (Sunnyvale, CA)
    Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... computer architecture. + 10 years of experience in physical design flow and methodologies for high-performance ASIC /SoC...(eg, STARRC). + Ability to develop and deploy repeatable design methodologies, focusing on low-power verification . +… more
    Google (10/24/25)
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  • Sr. Physical Design Methodology

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Key job responsibilities Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML...+ 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis,… more
    Amazon (10/25/25)
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  • Physical Design Methodology

    Amazon (Cupertino, CA)
    …today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to support ... or CS - Minimum of 3+ years in developing design methodology or CAD flows in synthesis,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design more
    Amazon (09/02/25)
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