- Broadcom (San Jose, CA)
- …apply.** **Job Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for ... DFx solutions while optimizing the cost for test. **Responsibilities** + Own IP DFT architecture, implementation, verification, signoff STA constraints for DFT +… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work collaboratively with cross-functional teams to… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most ... network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. .… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
- NVIDIA (Santa Clara, CA)
- …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- Renesas (San Jose, CA)
- Principal Digital Engineer Job Description This is an opportunity to join Renesas Infrastructure and Mixed-Signal Division, Memory Interface Product Line. You will ... selection, partitioning of hardware/firmware, RTL design, verification, FPGA prototyping, DFT , and IC qualification. **Responsibilities:** + Chip architecture, design,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC ... with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved… more
- NVIDIA (Santa Clara, CA)
- …impact on the world. We are now looking for a motivated Senior Timing Closure Engineer to join our dynamic and growing Circuit Solutions Group! If you are a highly ... timing closure strategy, timing constraints, timing and power convergence, DFT , as well as ECO implementation. What we need...to stand out from the crowd: + Understanding of DFT logic and experience with DFT timing… more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative and experienced ATE Test Engineer . NVIDIA has continuously reinvented itself over three decades. Our invention of the GPU in 1999 ... participate in cross function team including Product Development Engineering, DFT , and IC design to efficiently debug any product...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative ATE Test Engineer . NVIDIA has continuously reinvented itself for three decades. Our invention of the GPU in 1999 fueled the growth of ... + Actively participate with cross functional teams including Product Development Engineering, DFT , and IC design to efficiently debug product failures and implement… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom is looking for a digital signal processing engineer . In this highly visible role, you will be designing digital signal ... Design for test, understanding of scan concept and writing DFT friendly RTL. + Experience in synthesis, CDC, static...of logic optimization for low power, timing margins & DFT . + Deep understanding of Signal Integrity and Power… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking a highly motivated **Test Engineer ** to join our Semiconductor Test Engineering team. In this role, you ... analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Applied Materials (Santa Clara, CA)
- …Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design. Identify and execute continuous ... Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary according to the… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 5+...stages in the ASIC design flow including emulation, prototyping, DFT , timing analysis, floor planning, ECO, bringup & lab… more
- Cisco (San Jose, CA)
- …of our optical transceiver products. As an ATE Test Development Engineer , you'll work closely with cross-functional teams-including design, product engineering, ... our customers worldwide. **Your Impact** As an ATE Test Engineer , you will play a key role in ensuring...and CoCoS levels. + Influence NPI/design phases to optimize DFT /DFM, test coverage, calibration, and architecture decisions. + Monitor… more