- Intel (San Jose, CA)
- …our silicon products meet the highest quality standards for high-volume manufacturing. As a Senior DFT Design Engineer , you will be responsible for ... Overview We are seeking a senior skilled DFT Design Engineer to develop and implement comprehensive Design for Test solutions across our semiconductor… more
- Intel (San Jose, CA)
- A leading semiconductor company in California is seeking a Senior DFT Design Engineer to develop and optimize comprehensive Design for Test solutions. You ... ensure product quality and innovative testing solutions, while leveraging expertise in DFT methodologies such as SCAN, MBIST, and BSCAN implementations. The ideal… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world. We are now looking for a motivated Senior Timing Closure Engineer to join our dynamic and growing Circuit Solutions Group! ... timing closure strategy, timing constraints, timing and power convergence, DFT , as well as ECO implementation. What we need...to stand out from the crowd: + Understanding of DFT logic and experience with DFT timing… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer to join our dynamic and growing team. If ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative and experienced ATE Test Engineer . NVIDIA has continuously reinvented itself over three decades. Our invention of the GPU in 1999 ... participate in cross function team including Product Development Engineering, DFT , and IC design to efficiently debug any product...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 5+...stages in the ASIC design flow including emulation, prototyping, DFT , timing analysis, floor planning, ECO, bringup & lab… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs and ... that power everything from AI to gaming! As a Senior SOC Design Engineer , you'll work at...in ASIC design, Physical design, CAD, Package Design, Software, DFT , and more. Our ASICs pack hundreds of billions… more
- SanDisk (Milpitas, CA)
- …needs to keep our world moving forward. **Job Description** We are seeking a Senior Engineer , Product Development Engineering to join our innovative team in ... yield improvement efforts with appropriate functional owners; + Driving DFT techniques and implementing automation solutions where possible **Qualifications**… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... experience in implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most forward-thinking and hardworking… more
- NVIDIA (Santa Clara, CA)
- We are looking to hire a Senior Board Test Engineer who will work in the Test Solutions Group at NVIDIA developing manufacturing GPU /CPU test solutions for Data ... automated Diag generation and validation infrastructure. + Review and provide feedback for DFT in the early design stages. + Debug complex hardware and software… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and ... flow. + Strong hands-on debugging capability and problem-solving skills. + Background in DFT timing closure for various modes eg scan shift and capture, transition… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... synthesis and verification, knowledge of Place and Route, and understanding of Design-for-test ( DFT ) is a plus. + Proficiency in scripting language, such as, Perl,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing RAMs at leading edge process nodes ... synthesis and verification, knowledge of Place and Route, and understanding of Design-for-test ( DFT ) is a plus. + Proficiency in scripting languages, such as Python,… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a sufficient ... customer shipments. **Your Impact** You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing… more
