We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Google (Sunnyvale, CA)
- SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... on TPU architecture and its integration within AI/ML-driven systems. As a DFT Engineer you will be responsible for defining, implementing and deploying advanced… more
- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates ... for a DFT position at our San Jose, California Development Center....Center. The successful candidate will be responsible for leading DFT programs all the way from chip level … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... the ultimate goal of enabling human life on Mars. SR. SOC/ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** Broadcom is looking for highly qualified DFT engineer . In this role you will be contributing to the ... Computer Engineering with 6+ years of experience in ASIC DFT development for serial high-speed data center networking. +...serial high-speed data center networking. + Experience as a DFT architect for chip and block level IPs. +… more
- SpaceX (Sunnyvale, CA)
- ASIC/SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- NVIDIA (Santa Clara, CA)
- …diverse team today. We are now looking for a highly motivated and talented Senior DFT Infrastructure Engineer to join our DFX group to join this multifaceted and ... tools for ATE test vector release and fail analysis/diagnosis flows + Work with DFT , ATE bringup, Silicon FA teams + Create regression testcases to ensure flow… more
- Meta (Sunnyvale, CA)
- …DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT strategies for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work...our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and verification to build best-in-class System… more
- Microsoft Corporation (Mountain View, CA)
- …and optimize the Cloud infrastructure. We are looking for a **Senior Design for Test ( DFT ) Engineer ** to join the team. **Responsibilities** + Own block level ... DFT arch specification documentation & provide Test solutions (logic...& lower test time. + Maintain & enhance existing DFT tools by understanding product needs & tailor solutions… more
- Cisco (San Jose, CA)
- Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. **Key Responsibilities:** + Responsible… more
- SanDisk (Milpitas, CA)
- …forward. **Job Description** We are looking for an experienced **Digital Physical Design Engineer ** to work whole digital SPR flow from RTL to GDS, include ... Synthesis, DFT scan insertion, PNR, STA timing analysis, IRdrop power...PT, StarRC ESSENTIAL DUTIES AND RESPONSIBILITIES: + **Synthesis and DFT scan insertion** + Familiar timing constraint and qualify,… more
- Cisco (San Jose, CA)
- Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444752) + Location:San Jose, California, US + Area of InterestSupply Chain + Compensation ... in Silicon Operations, and with Cisco Systems NPI teams. Collaborate with DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to resolve silicon… more
- NVIDIA (Santa Clara, CA)
- …methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- Amazon (Sunnyvale, CA)
- …the world. Key job responsibilities As a Sr. PCBA Manufacturing Test Engineer , you will be responsible for deployment, qualification, continuous improvement of test ... test coverage, fault isolation capability, PCBA failure trends, and DFT (Design for Test) recommendations. * Run small teams...low-cost satellite system. As a Sr. PCBA Manufacturing Test Engineer , you have the ability to dive deep on… more
- NVIDIA (Santa Clara, CA)
- …on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and ... You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level...power/area optimization across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior DFX Software Engineer - Machine Learning. Do you like to think creatively and enjoy solving challenges that require innovation? If ... EDA solution. + Expertise in high performance algorithms for DFT , simulations, and failure analysis. + Understanding of different...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Meta (Sunnyvale, CA)
- …to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization ... lint and work w/ designers to create waivers. 6. Perform RTL DFT analysis and improve DFT coverage for stuck-at faults. 7. Perform flat and hierarchical clock… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking a highly motivated **Test Engineer ** to join our Semiconductor Test Engineering team. In this role, you ... analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Palo Alto Networks (Santa Clara, CA)
- …capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test platforms for network ... for test coverage and serviceability with ICT and boundary scan + Drive DfT (Design for Testability) and test coverage analyses from early Prototype design stages… more
- NVIDIA (Santa Clara, CA)
- …position within a top-tier organization? In the role of Silicon Product Development Engineer at NVIDIA, you will be instrumental in launching our brand new Data ... ASIC Mixed Signal design, characterization, and qualification of BIST and SCAN DFT methodologies. + Knowledgeable in advanced Silicon Process technology such as… more