We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- NVIDIA (Santa Clara, CA)
- …+ Engage with EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology . + Design optimization of 3D advanced silicon/package ... 3D-IC Test Chips validation of 3D-IC technology platforms and design methodology . What we need to see:...Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT,… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- NVIDIA (Santa Clara, CA)
- …into a single chip. Your role will be cross-disciplinary, working with software, ASIC design , verification, physical design , VLSI and platform teams. Our SoC ... We are now looking for a Senior Hardware SoC Architect for our Tegra team!...+ Hardware architecture end-to-end lifecycle ownership. + Drive Architecture/Software/Hardware co- design and collaboration on features set. + Perform performance,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are ... work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and low-power designs + Focus… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Compiler, ICC2 and Primetime. + Working closely with R&D on tools and methodology improvements + Create and contribute technical content for Cadence Online Support ... The Position Requirements are + Bachelor's degree with at least 3-6 years of design /EDA experience or Master's degree with at least 4 years of experience. Master's… more
- Stanford Health Care (Palo Alto, CA)
- …responsible for overseeing the management of the team in curriculum development, teaching methodology design , and delivery of training as required by the project ... **This is a Stanford Health Care job.** The Learning Design and Evaluation Sr. Manager at Stanford Medicine is...asset of Stanford Health Care. **A Brief Overview** The Senior Manager - Informatics Education is responsible for leading… more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Design Verification Engineer** to work on leading-edge Intellectual Property ... constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology (UVM) components… more
- HP Inc. (Palo Alto, CA)
- …factors integrating Artificial Intelligence to deliver new products and features. * Agile Methodology * Cascading Style Sheets (CSS) * Design Thinking * Figma ... teams to understand project goals and requirement. The role clearly communicates design concepts and rationale to both technical and non-technical stakeholders. The… more
- Microsoft Corporation (Mountain View, CA)
- …equivalence checking tools, flows, and methods to our rapidly expanding RTL and physical design teams located across various sites within the Microsoft silicon ... ) flow systems + Perform detailed debug/analysis to guide the RTL and physical design teams across Microsoft's silicon portfolio in addressing and solving… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block ... We are now looking for a motivated Senior ASIC Engineer, Timing to join our dynamic...quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence,… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis ... as part of the advanced technology team to optimize design tradeoffs and methodology on next generation...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- NVIDIA (Santa Clara, CA)
- …for NVIDIA's front-end ASIC software including RTL synthesis, equivalence checking, and early physical design and methodology for all of NVIDIA's ... algorithms, data structures, testing + Familiarity with Verilog and ASIC and physical design along with experience in commercial EDA tools + Strong proficiency… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Siemens Digital Industries Software (Fremont, CA)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more
- Lucile Packard Children's Hospital Stanford (Palo Alto, CA)
- …range of hospitals throughout the greater Bay Area, and beyond. As the Senior Associate Dean for Maternal and Child Health, partners with the Chief Administrative ... and to provide highest quality of education and care. The Chief Medical Officer/ Senior Associated Dean will play a key role in strategic planning, program… more
- Microsoft Corporation (Santa Clara, CA)
- …connect to PCIe Controllers. . Review and provide feedback on verification plans and methodology . . Collaborate with Physical design teams to ensure ... Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer - PCIe. You will join our...Science, or related field. + 5+ years of RTL design and/or architecture experience + In depth domain knowledge… more
- Qualcomm (Santa Clara, CA)
- …correlation. + Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, power analysis ... team you will be working on WiFi (802.11x) technology, SOC Design , Low Power micro-architecture, Power Intent/Implementation, power estimates and power reduction… more
- Palo Alto Networks (Santa Clara, CA)
- …to collaborate and thrive, together! **Your Career** Palo Alto Networks is seeking a Senior Design Validation Test Engineer to join the Hardware Validation Test ... at the contract manufacturing facility + Develop, and Continuing enhance validation methodology in both design and manufacturing **Your Experience** + Experience… more