- Eridu Corporation (San Francisco, CA)
- A leading AI hardware startup in San Francisco is seeking a Post-Silicon ASIC Validation Engineer . The ideal candidate will focus on validating complex ... design teams. Candidates should have a relevant degree and expertise in ASIC validation , UCIe standards, and Python scripting. The role offers a salary range… more
- Amazon (San Francisco, CA)
- A leading tech company in San Francisco is seeking an ASIC Validation Engineer for their Blink/Ring ASIC Team. The role involves defining architecture ... specifications, leading junior engineers, and working with verification teams. Successful candidates will have a Bachelor's degree in Electrical Engineering and strong debugging skills. The company fosters an inclusive culture and is looking for innovators to… more
- Apple Inc. (San Francisco, CA)
- A leading technology company in San Francisco is seeking a Power ASIC Validation and Integration Engineer to develop and integrate innovative validation ... methodologies for wireless power module ICs. This role requires experience in analog and digital circuit design, proficiency in Python, and teamwork with multi-discipline teams. Ideal candidates will have a passion for innovation and problem-solving skills to… more
- Apple Inc. (San Francisco, CA)
- Power ASIC Validation and Integration Engineer San Francisco Bay Area, California, United States Hardware Imagine what you could do here. At Apple, new ideas ... Wireless world. Description We are looking for an applications engineer that is highly motivated to develop and integrate...is highly motivated to develop and integrate innovative bench validation methodologies for our wireless power module ICs to… more
- Eridu Corporation (San Francisco, CA)
- …Principal Engineer . We are looking for a highly experienced Post-Silicon ASIC Validation Engineerwith deep expertise in networking ASICs and chiplet-based ... architectures. You will lead bring-up, validation , and characterization of complex multi-die systems integrating high-speed interconnects such as UCIe, SerDes, PCIe,… more
- Amazon (San Francisco, CA)
- Sr. ASIC Design Engineer , Cloud-Scale Machine Learning Acceleration team Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure ... massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Engineer to help us trail‑blaze new technologies and… more
- Eridu Corporation (San Francisco, CA)
- …Overview We are seeking a highly skilled and detail-oriented Senior Diagnostics Engineer to join our hardware/software integration team. The ideal candidate will ... with Diagnostics for Board Support Packages (BSP), Baseboard Management Controllers (BMC), ASIC , SERDES interfaces, and OSFP modules. This role is critical in… more
- Apple Inc. (San Francisco, CA)
- …by a world class vertically integrated engineering teams. Description As a Wireless ASIC /FPGA Prototyping Design Engineer , you will work in a team developing ... Engineer here at Apple? Responsibilities As a Wireless ASIC /FPGA Prototyping Design Engineer , you will work...collaterals in the lab - Support pre-Silicon and post-silicon validation and collaborate Minimum Qualifications BS and a minimum… more
- Quix Recruitment Group Ltd (San Francisco, CA)
- …RTL designs and collaborating across architecture, verification, physical design, and validation teams to deliver next‑generation ASIC /SoC systems. What You'll ... complex hardware systems. They are seeking an RTL Design Engineer to join their hardware development team. This role...test plans, review coverage, and debug design issues. Support validation and bring-up teams during silicon bring‑up and debug… more
- Eridu Corporation (San Francisco, CA)
- …first augmented reality contact lens). Position Overview We are seeking an RTL Engineer to help define and implement our industry‑leading Networking IC. If you're a ... and Testing : Implement memory management designs on FPGA or ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Conduct… more
- Eridu Corporation (San Francisco, CA)
- …/ arbitration design. Implementation and Testing: Implement designs on ASIC platforms, ensuring compliance with industry standards and performance benchmarks. ... Work with verification team to conduct thorough testing and validation to ensure functionality and reliability. Performance Optimization: Analyze and optimize… more
- Eridu Corporation (San Francisco, CA)
- …lens). Position Overview We are seeking a highly skilled and motivated Emulation Engineer to join our hardware development team. The ideal candidate will be ... collaboration with cross‑functional teams including design, software, firmware, and validation to accelerate hardware verification and software development. Responsibilities… more
- Eridu Corporation (San Francisco, CA)
- …first augmented reality contact lens). Position Overview We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a ... stack. Engage in post-silicon activities such as bring-up, platform validation , characterization, parameter optimization, and final productization. Support the… more
- Eridu Corporation (San Francisco, CA)
- …in synthesis and place-and-route. Support post-silicon PCIe bring-up and validation focused on protocol correctness, link behavior, and subsystem performance. ... performance, and timing closure targets. Qualifications MSEE with 15+ years of ASIC /SoC RTL design experience. Proven success designing PCIe controller or PCIe… more
- SQL Pager LLC (San Jose, CA)
- …or MSEE with 1+ years experience Advanced knowledge of standard ASIC /FPGA verification flows including simulation, testbench development, and post silicon bring-up ... and validation Excellent knowledge of System Verilog and Verilog Experience in developing test benches using the OVM, VMM or UVM methodology Good knowledge with… more
- Hewlett Packard Enterprise Development LP (San Jose, CA)
- ASIC Engineer Sr StaffThis role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.**Who We ... for next-generation networking platforms. We are looking for a seasoned**Design-for-Test (DFT) Engineer ** to join our team and contribute to the development of… more
- SQL Pager LLC (San Jose, CA)
- Responsibilities: IP and/or chip level micro-architectures, implementation, and validation Develop algorithmic computation engines, NAND memory controller, and so on ... Write up micro-architecture and design document and be able to present to customers Develop RTL, perform synthesis, lint and CDC check Working with customers to trouble shooting, debug, and tune system performance Requirements: MS Electrical Engineering or… more
- Cornelis Networks, Inc. (San Jose, CA)
- …with Physical Design engineers to optimize timing closure. Support post-silicon validation , collaborating with hardware, firmware, and software teams to debug and ... resolve ASIC issues. Contribute to performance optimization and power-aware design strategies for Ethernet subsystems. Minimum Qualifications BS or MS degree in… more
- Cisco Systems (San Jose, CA)
- …team where professionalism meets impact Your Impact: We are seeking a Post‑Silicon Validation Engineer with an interest in software ‑oriented hardware ... Meet the team: Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a...working together to ensure the successful verification of the ASIC throughout its lifecycle. Operating at the forefront of… more
- Cisco Systems (San Jose, CA)
- Meet the team: Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the ... cross‑functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Operating at the forefront of technology, we… more
