- Renesas (San Jose, CA)
- Principal Digital Engineer Job Description This is an opportunity to join Renesas Infrastructure and Mixed-Signal Division, Memory Interface Product Line. You will ... and subsystems, and experience in driving spec, design, and chip implementation. This includes but is not limited to...DMA and interrupt system + Digital IP RTL design, simulation , and release + Independently handle complicated design tasks… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … stack development in emulation + Collaborate with architecture, IP, verification, and software teams to ensure smooth transitions from simulation to emulation + ... who want to make an impact on the world of technology. Design Engineer - Emulation & High-Speed Interfaces Palladium Solutions Development Why Join Us We're… more
- Broadcom (San Jose, CA)
- …in the networking world. Broadcom, a global innovator in fabless communications semiconductors, software , and systems, is proud to be recognized as one of Fortune ... for growth in an open, collaborative work environment. If you're a passionate engineer eager to shape the future of networking, **Broadcom** is where you can… more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom is seeking an experienced package mechanical FEA engineer for very-large and complex packages for industry-leading ASICs. You will ... such as co-packaged fiber-optic transceivers and connectors and complex chip stacking (3DIC, hybrid copper bonding, heterogeneous integration, etc). Also,… more
- Cisco (San Jose, CA)
- …+ Your work will enable the infrastructure to support the entire chip design process, enhancing simulation accuracy, performance, and multi-functional ... at Cisco Silicon One, focusing on advanced modeling and simulation using SystemC. + Contribute to developing complex infrastructure...verification teams from initial definition to signoff of the chip + Work closely with software teams… more
- Microsoft Corporation (Mountain View, CA)
- …paramount importance. To achieve this goal, the Artificial Intelligence System on Chip (AISoC) team is instrumental in defining and delivering operational measures ... the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join our team! **Responsibilities** + Perform pre-silicon verification for… more
- Renesas (San Jose, CA)
- …without compromising performance. + **Tool Development** : Create and maintain bench automation software for data collection, as well as simulation models and ... Staff Application Engineer Job Description We are seeking an experienced...analyze DDR5 power consumption at various system levels (eg, chip , board, and system). + **Customer Support** : Provide… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Description: We are looking for a highly skilled and motivated 3DIC Design Flow Engineer to implement system planning and integration of complex HPC and AI systems ... AI applications. This is a challenging and rewarding opportunity for a highly motivated engineer with a passion for innovation and a proven track record of success… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** ASIC/Layout Design Engineer : Oversees definition, design, verification, and documentation for ASIC ... development. Determines architecture design, logic design, and system simulation . Defines module interfaces/formats for simulation . Contributes to the… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a agile team working with… more
- Google (Mountain View, CA)
- …of machine learning acceleration. In order to set you up for success as a Software Engineer at Google DeepMind, we look for the following skills and experience: ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...the system architecture definition and evaluation. + Collaboration with simulation and PD teams to maintain up to date… more
- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** **Design Automation Engineer ** This position is part of a team tasked with the support ... testing of flows and verification checks + Parasitic extraction and simulation , abstract and LEF/DEF generation, LVS/ERC checks + Conducting design reviews… more
- Microsoft Corporation (Mountain View, CA)
- …and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be responsible for ... experience. + 4+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems.… more
- Broadcom (San Jose, CA)
- …responsible for state-of-the-art subsystem development to meet customer requirements. The engineer will be responsible for a variety of advanced verification tasks ... position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. Candidate...based prototyping is a plus. + Familiarity with overall chip design methodologies and tools + Knowledge of CPU,… more
- Cisco (San Jose, CA)
- …transmission systems, subsystems, and components (including process development, photonic chip layout, simulation , verification). Selection and qualification of ... optimization and design testing. + Leads collaboration with hardware and software teams to design optical modules. + Identifies opportunities for multiple… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such ... Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in...STA, EDA tools, design flows for physical design, logic simulation , test, and packaging + Programming in TCL, shell… more