- Meta (Sunnyvale, CA)
- …impact they can create as part of a world-class engineering team. Package Design Engineer Responsibilities Drive chip-package-system co- design by driving ... interface and PDN, create simulation models and develop simulation methodology for SIPI design Lead SIPI validation...Input/Output Physical Layer (IO PHY), SI/PI and physical design Minimum Qualifications Bachelor's degree in… more
- Hewlett Packard Enterprise Development LP (San Jose, CA)
- Hardware Design Engineer -Access Point WIFI This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We ... culture will embrace you. Open up opportunities with HPE. Job Description: Hardware Design Engineer -Access Point WIFI HPE is looking for motivated and talented… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- Microsoft Corporation (Mountain View, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Physical Design Engineer ** to join the team. **Responsibilities** + ... -for-Test (DFT) & Functional mode Timing Analysis and convergence within the Physical Design (PD) domain. + Facilitate coordination across cross-functional… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will ... and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design & Timing...in refining design and timing constraints for seamless physical design closure. As part of this team, ... of what's possible! **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and... team who oversees fullchip SDCs and works with physical design and DFT teams to close… more
- Meta (Menlo Park, CA)
- …create as part of a world-class engineering team. **Required Skills:** Package Design Engineer Responsibilities: 1. Drive chip-package-system co- design by ... interface and PDN, create simulation models and develop simulation methodology for SIPI design 7. Lead SIPI...Input/Output Physical Layer (IO PHY), SI/PI and physical design **Minimum Qualifications:** Minimum Qualifications: 13.… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... functional coverage. + Help define, evolve, and support our design methodology . + Collaborate with the verification...and close code coverage. + Work closely with the physical design team to close design… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of InterestEngineer - ... in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA....experience required; prior experience with System Verilog and UVM methodology + Prior experience in verifying complex blocks, clusters… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... to meet timing and performance requirements. + Help define, evolve, and support our design methodology . + Collaborate with the verification, PD, DFT, Package and… more
- Arrow Electronics (San Jose, CA)
- …a member of design team who oversees **fullchip SDCs** and works with physical design and DFT teams to close **fullchip timing** in multiple timing modes. ... **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC ...+ Option to also do block level RTL design or block or top-level IP integration. + Helping… more
- Celestica (San Jose, CA)
- … Engineer , Software **Functional Area:** Engineering (ENG) **Career Stream:** Design - Software Engineering **Job Code:** SEN-ENG-DSE **Job Band:** 10 ... & Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this… more
- Stanford University (Stanford, CA)
- Software Engineer (1 Year Fixed Term, Remote Opportunity) **School of Medicine, Stanford, California, United States** **New** Information Technology Services Post ... 106862 Stanford University and the Department of Behavioral Sciences is seeking a Software Engineer on a 1 year fixed term to help develop and maintaining scalable,… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... City: San Jose **General Overview** **Functional Area:** Engineering **Career Stream:** Design - Software Engineering **SAP Short Name:** SLE-ENG-DSE **Job Level:**… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and also of the competition's technology and sales strategies. + Perform methodology assessments, improve existing design methodologies, and develop new ones ... of technology. Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational...on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... City: San Jose **General Overview** **Functional Area:** Engineering **Career Stream:** Design - Software Engineering **SAP Short Name:** LEN-ENG-DSE **Job Level:**… more
- Siemens (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...competent leadership from our managers and executives. This Applications Engineer (AE) position delivers technical expertise for Functional Verification… more
- Broadcom (San Jose, CA)
- …clock methodology , power planning and analysis, timing closure, signal integrity and physical design checks. + Participate in large complex design ... you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Abbott (Alameda, CA)
- …working mothers, female executives, and scientists. **THE OPPORTUNITY** This **Algorithm Engineer ** position works out of **Alameda, CA** location in the Abbott ... levels with our FreeStyle Libre family of sensor systems. This Algorithm Engineer position is responsible for participating in the algorithm development of new… more
