• Physical IC Design Engineer

    Broadcom (San Jose, CA)
    …you apply.** **Job Description:** Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves working ... driving next generation Artificial Intelligence and Machine Learning ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world… more
    Broadcom (01/07/26)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …MS.or PhD degree in Computer Science, Engineering, or related fieldStrong RTL and Testbench debug skillsExperience in synthesizable coding styleExperience in writing ... and asynchronous interfacesKnowledge of the FPGA development process & tool flow from RTL to bitstream for Xilinx and/or Altera productsHands on experience with lab… more
    Cadence Design Systems, Inc. (12/04/25)
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  • ASIC Engineer , Networking Architecture…

    Meta (Menlo Park, CA)
    **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for ... on data center networking architecture, network system design, micro-architecture, RTL design, Design Verification, Firmware/Software development, Pre-Post silicon validation,… more
    Meta (12/20/25)
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  • Senior Principal Emulation Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Design Engineer - Emulation & High-Speed Interfaces Palladium Solutions Development Why Join Us We're ... system emulation and verification solutions-and we're looking for a seasoned Design Engineer to help lead the way. If you're passionate about high-speed interfaces,… more
    Cadence Design Systems, Inc. (11/18/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be responsible for ... utilizing AI in the day-to-day work + Experience with PCIe subsystems + Experience with the use of formal...the use of formal verification methods + Experience in RTL design for FPGA or emulation + Experience in… more
    Microsoft Corporation (12/17/25)
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  • Senior Emulation Engineer

    Cisco (San Jose, CA)
    …as experience with compilation, debug, performance testing. + Prior experience with RTL development for Emulation prototypes. + Prior experience with C/C++ and TCL ... validation or debugging experience is a plus. + Experience with protocols eg PCie , I2C, Ethernet packet headers, Ethernet protocol is preferred. **Why Cisco?** At… more
    Cisco (01/08/26)
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