- SpaceX (Sunnyvale, CA)
- ASIC / SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... to make this possible, with the ultimate goal of enabling human life on Mars. ASIC / SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- Meta (Sunnyvale, CA)
- … DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure...for individuals with a background in Design for Testability ( DFT ) methodologies and implementation for IP/ SOC , with… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking ... to production. The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD ( ASIC Products Division)'s designs - … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... circuit designers to and deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT ,… more
- Amazon (Cupertino, CA)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...technical field - 3+ years in RTL design for SOC - 3+ years of VLSI engineering - 3+… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... work w/ designers to create waivers. 6. Perform RTL DFT analysis and improve DFT coverage for...for RTL-synthesis and PrimeTime-STA for blocks and top-level including SOC . 11. Analyze inter-block timing and create IO budgets… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams.... teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams.... teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. We ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip...timing signoff flow. * Work for Systems and Architecture, SoC Integration, Verification, DFT , Mixed Signal, IP… more
- Cisco (San Jose, CA)
- …to optimize test efficiency and drive yield improvements. Collaborate with Design, SoC , DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to ... Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444752) + Location:San Jose, California, US...As part of the team you will collaborate with ASIC design teams in the Central Hardware Group, peer… more
- Cisco (San Jose, CA)
- Sr.Test Development Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1448472) + Location:San Jose, California, US + Area of InterestSupply Chain + ... are received.** **Meet The Team** You will collaborate with ASIC design teams in the Central Hardware Group, peer...test activities. **Your Impact** You will be a Test Engineer in Silicon Operations focusing on the ATE test… more