- NVIDIA (Santa Clara, CA)
- We are now looking for a ASIC Floorplan Design Engineer - NCG. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and ... development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our...multi-hierarchy low-power and high-performance designs, including physical-aware logic synthesis, floorplan , place and route, clock tree synthesis, static timing… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and back end team to help craft the physical floorplan of the chip. The team explains the programming...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- SpaceX (Sunnyvale, CA)
- …chip architects, ASIC engineers, package engineers and block level physical design engineers to drive, chip floorplan reviews and identify area, ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
- NVIDIA (Santa Clara, CA)
- …and their impacts to circuit/layout implementations and signoff flows + Expert with ASIC design semi-custom and full-custom flow + Hands-on experience running ... are looking for you. You will work on the design and development of our next generation of custom...timing, area and yield + You'll make the layout floorplan and work with layout designers to optimize it… more
- Google (Sunnyvale, CA)
- …and formulate correct by construction approach. + Collaborate with the physical design , floorplan , and package teams to ensure reliability structures are ... ESD and LU Sign-Off Engineer - Sunnyvale _corporate_fare_ Google _place_ Sunnyvale, CA,...experience. + 8 years of technical experience in physical design disciplines involving ESD (Electrostatic Discharge)/LU (Latch-Up) and advanced… more