- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic ... inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs ... and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic...+ Experience with Static Timing Analysis (STA) + Experience physical design and optimization eg, synthesis, floorplanning,… more
- NVIDIA (Santa Clara, CA)
- …timing paths through ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing, cell sizing, buffering, ... amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to… more
- Amazon (Cupertino, CA)
- …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... Basic Qualifications - BS + 8yrs or MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
- Amazon (Cupertino, CA)
- …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core block physical… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible ... in Electrical Engineering or Computer Engineering with 6+ years of experience in Physical design .** + **Deep knowledge about industry standards in Physical … more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies ... in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and route,… more
- The Boeing Company (Mountain View, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers**...Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow ... development and support 2. Physical Design implementation flow development and support...tools development and automation to help improve productivity across ASIC design cycles including but not limited… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... doing: + Be an integral part of the System ASIC Design team to help with the...CHI + Familiar with OCP secure boot specification and physical security handling process + Possess design … more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design . You will involve in engineering implementation spec writing from ... team. You will work closely with marketing, architecture, firmware, physical and layout teams on full product development cycle...have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... , Verilog and/or System-Verilog with a deep understanding of physical design and VLSI + Experience with...+ Strong familiarity and experience with all stages of ASIC design flow including front end … more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...design readiness for scan insertion through RTL and physical design Scan Design Rule… more