- Google (Sunnyvale, CA)
- …or a related field, or equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced process nodes. + ... including timing, PDV, EMIR, package concerns, and power. + Experience with custom physical design , which may include custom datapath design , standard cell … more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...Inclusive Communities, which unite people around commonalities or passions, lead the way. Together, we're committed to learning, listening,… more
- Amazon (Sunnyvale, CA)
- …Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design . * Strong exposure to UPF flow for low power design ... In this role you will: * As the implementation lead you will set up the flow for both...flow for various technology nodes. * Work with the ASIC design and DFT teams to understand… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a Technical Program Manager with ASIC design and development experience. This Technical Program Manager (TPM) will lead ... from technical details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification,… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose,...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Cisco (San Jose, CA)
- …flows. * Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...be in the Silicon One development organization as an ASIC DFT Product Lead in San Jose,… more
- Amazon (Sunnyvale, CA)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... opportunity to shape the technical direction of critical IC design workflows and lead a team of...infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's… more
- Cisco (San Jose, CA)
- … in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Cisco (San Jose, CA)
- …as per need for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with ... Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience...Experience working with one or more of the following physical design tools, such as Cadence, Innovus,… more
- Broadcom (San Jose, CA)
- …route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... before you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines...nodes, lead one or more disciplines in design closure as part of the design … more
- Google (Sunnyvale, CA)
- …or Computer Science, with an emphasis on computer architecture. + 5 years of experience in ASIC design with 3 years of experience working on security design . ... this role, you will utilize, a background in RTL design , and the ability to lead multi-faceted...to verify and debug RTL designs. + Work with physical design teams to ensure design… more
- Capgemini (Santa Clara, CA)
- …including strategic account development in complex semiconductor services sales, particularly in ASIC design services and sales pursuit management with at least ... of Semiconductor Sales Practice at Capgemini Engineering, you will lead the sales and Industry SME teams for a...foundries, EDA companies, and IP providers. + Background in ASIC Design or Semiconductor Technology R&D is… more
- NVIDIA (Santa Clara, CA)
- …cars and the growing field of artificial intelligence. What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like high speed ... you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
- Qualcomm (Santa Clara, CA)
- …on RTL and Netlist using tools like Joules and PTPX. + Work closely with RTL design , Synthesis, and physical design teams to measure and optimize power. + ... propose new power optimization techniques at RTL, Synthesis and Physical Design Stages. + Tabulate metrics results...Power analysis and optimization required + 15+ years of ASIC design , or related work experience. +… more
- Google (Sunnyvale, CA)
- …equity, or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/) . + Lead System SI design on data center hardware products. + ... This is a specialized role which requires physical interaction with hardware equipment in a simulated...with the product development process for mass volume production design , with a focus on signal integrity, power integrity… more
- Meta (Menlo Park, CA)
- …documentation for installed network gear 4. Establish and implement global best practices and lead the design of new scalable network solutions 5. Define and ... C/C++ for developing automation software or tooling 14. Working knowledge of physical infrastructure design including structured cabling and fiber-optic cabling… more
- SpaceX (Sunnyvale, CA)
- …who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification, post-silicon validation, ... You will be an integral part of the IC design team and lead the discipline of...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- Broadcom (San Jose, CA)
- …multiple different customer meeting per week + Your strong partnerships with internal Physical design teams, IP teams & GO-Test/Yield/Qual Engineering teams will ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for a DFT...Design Center. As a DFT Manager, you will lead a group of highly performing DFT Engineers working… more
- Microsoft Corporation (Mountain View, CA)
- …secure software design + Identify opportunities for process improvement and lead initiatives to enhance efficiency and productivity within the team + Embody our ... software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to… more
- Siemens (Fremont, CA)
- …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and… more