- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... - BS + 10yrs or MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- Google (Sunnyvale, CA)
- Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, ... with EDA tool workflows in a semiconductor environment. + Experience developing automated physical design workflows from RTL to GDS, utilizing Tcl, Python, or… more
- Amazon (Cupertino, CA)
- …of machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our ... today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world! We are currently looking for a Sr VLSI Physical Verification Methodology Engineer . What you'll be doing: + Developing ... years in physical verification. + Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- …on the world. We are now looking for a Senior Power Integrity Methodology Engineer . What you'll be doing: + Developing physical design methodologies for ... or related field. + Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support. + Strong understanding of all aspects of IR/EM/thermal… more
- NVIDIA (Santa Clara, CA)
- …our diverse team today! The Advanced Technology Group is looking for a highly motivated Principal Physical Design Engineer to join our group. Do you have a ... proven EE background with an in-depth understanding of physical design , place and route, timing analysis,...be doing: + Lead the Advanced technology node P&R methodology architecture and development + Advanced technology node test… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs 24. Experience in the 3D-IC technology, methodology , and advanced packaging 25. Experience in validating Power… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will ... and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip… more
- NVIDIA (Santa Clara, CA)
- …timing paths through ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing, cell sizing, buffering, ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...+ Experience with Static Timing Analysis (STA) + Experience physical design and optimization eg, synthesis, floorplanning,… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Perform ... where applicable. **Additional** **or Preferred Qualifications** + 10+ years of design verification experience with Universal Verification Methodology (UVM),… more
- Cisco (San Jose, CA)
- Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... peer review of complex IC designs and provide solid design methodology from conception to production. +...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- NVIDIA (Santa Clara, CA)
- …spec + Lead and influence other layout designers to improve team efficiency and align design methodology What we need to see: + Associates degree (or equivalent ... We are looking for you! You'll work on the design and development of our next generation custom SRAM...the NVIDIA products! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art… more
- NVIDIA (Santa Clara, CA)
- …for NVIDIA's front-end ASIC software including RTL synthesis, equivalence checking, and early physical design and methodology for all of NVIDIA's ... Be part of a diverse team creating NVIDIA's chip design methodology ! These chips are among the...the crowd: + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Experience… more
- Arrow Electronics (San Jose, CA)
- …a member of design team who oversees **fullchip SDCs** and works with physical design and DFT teams to close **fullchip timing** in multiple timing modes. ... **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC ...+ Option to also do block level RTL design or block or top-level IP integration. + Helping… more