- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level RTL synthesis engineer . In this highly visible role, you will ... years of experience in Physical design.** + **Expert in Logic/Physical Synthesis using advanced optimization techniques and generating optimized Gate Level Netlist… more
- Amazon (Sunnyvale, CA)
- …Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that is ... - Develop detailed design specifications and documentation - Perform RTL coding and synthesis - Work with Partners/Supplier to optimize and customize their… more
- Amazon (Sunnyvale, CA)
- …tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As an RTL Design Engineer , you will be part of an advanced architecture team that is ... - Develop detailed design specifications and documentation - Perform RTL coding and synthesis - Work with Partners/Supplier to optimize and customize their… more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** **Broadcom is looking for a high-speed DSP SerDes RTL designer. Qualifications include:** + **MS or PhD in Electrical Engineering or ... years of experience in high speed ADC based SerDes RTL design.** + **Proficient with Verilog-HDL/System Verilog coding for...and cost over the project lifetime.** + **Experience in synthesis , CDC, static timing analysis.** + **Exposure to SDF… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design, debug and functional verification + Strong background in DSP and ... of Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate ... CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and...synthesis and integration. + Deep understanding of Verilog RTL design and digital design principles. + Proven experience… more
- SanDisk (Milpitas, CA)
- …**Digital Physical Design Engineer ** to work whole digital SPR flow from RTL to GDS, include Synthesis , DFT scan insertion, PNR, STA timing analysis, ... ICC2, Innovus, PT, StarRC ESSENTIAL DUTIES AND RESPONSIBILITIES: + ** Synthesis and DFT scan insertion** + Familiar timing constraint...A minimum of 3 years in Physical design digital RTL to GDS flow. + **Education** : Bachelor's or… more
- NVIDIA (Santa Clara, CA)
- …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track...Learning + Experience in other ASIC methodologies such as RTL Lint, CDC, DFT or STA. + Experience with… more
- SanDisk (Milpitas, CA)
- …all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis , and timing analysis to deliver a ... of innovation. We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory...Logic design flow from RTL to GDSII ( RTL coding, simulation, synthesis , static timing analysis,… more
- SanDisk (Milpitas, CA)
- …all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis , and timing analysis to deliver a ... of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory...Logic design flow from RTL to GDSII ( RTL coding, simulation, synthesis , static timing analysis,… more
- Meta (Sunnyvale, CA)
- …"Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... and corresponding reset sequence for RDC. 10. Develop timing constraints for RTL - synthesis and PrimeTime-STA for blocks and top-level including SOC. 11. Analyze… more
- Google (Mountain View, CA)
- …IP design. + Experience with methodologies for low power estimation, timing closure, synthesis . + Experience with methodologies for RTL quality checks (eg, Lint, ... ASIC Engineer , IP Design, Silicon _corporate_fare_ Google _place_ Mountain...RTL development (SystemVerilog), debug functional/performance simulations. + Perform RTL quality checks including Lint, CDC, Synthesis ,… more
- NVIDIA (Santa Clara, CA)
- …performance requirements and system limitations. + Craft micro-architecture, implement in RTL , and deliver a fully verified, synthesis /timing clean design. ... We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement...caches. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing… more
- Amazon (Cupertino, CA)
- …power, performance or area requirements. - Develop micro-architecture, implement SystemVerilog RTL , and deliver synthesis /timing clean design with constraints. - ... you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design, microarchitecture or… more
- NVIDIA (Santa Clara, CA)
- …performance requirements and system limitations. + Craft micro-architecture, implement in RTL , and deliver a fully verified, synthesis /timing clean design. ... (Verilog). + Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems and… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in the technology sector, is seeking a Hardware Design Engineer 5 to join their team. As a Hardware Design Engineer 5, you will be part of ... align successfully in the organization. **Job Title:** Hardware Design Engineer 5 **Location:** Austin, TX and Mountain View, CA...**Pay Range:** **What's the Job?** + Design and implement RTL for image and video processing IP blocks. +… more
- Amazon (Cupertino, CA)
- …integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring ... the right trade-offs. Key job responsibilities - Work with RTL /logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs… more
- Amazon (Sunnyvale, CA)
- …high-speed broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining EDA tools and flows ... processes - Develop, regress, and deploy digital front end flows including RTL static checks and design verification methodology - Develop, regress and deploy… more
- Microsoft Corporation (Mountain View, CA)
- …the Cloud infrastructure. We are looking for a **Principal Physical Design Engineer ** with **CPU Core expertise** to join the team. \#SCHIE #CSME \#Siliconjobs ... with PPAS (Power, Performance, Area & Schedule) target accomplishments. + Responsible for RTL to GDS implementation in Physical Design domain. + Coordinate with CAD,… more
- NVIDIA (Santa Clara, CA)
- …collaboration skills. Ways to stand out from the crowd: + Prior experience in RTL design (Verilog), verification and synthesis . + Proficiency in C++, Perl, ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design. Understanding both Software and Hardware principles will be a key… more