- NVIDIA (Santa Clara, CA)
- …optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and ... amplify human inventiveness and intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... Make the choice to join us today. With the System- ASIC team, you will contribute to designing multiple products...The team is also handling the architecture, design, and synthesis of multiple System-level modules. What you'll be doing:… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI design,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis, ECO, and post silicon debug. + Strong interpersonal skills… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree...multi-million gate designs across multiple FPGAs. + Proficiency in ** synthesis , place, and route flows for FPGAs.** + **An… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic ... including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all...industry-standard tools or in-house tools. + Background with logic synthesis at either block or full-chip level, at project… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing and power convergence,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/ Synthesis /DFT/LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in python or other… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and ... flows and methodologies. + Familiarity with methodology and tools, logic synthesis , equivalence checking. + Strong interpersonal and communication skills and ability… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... signal routing - As a key member of the ASIC design team, you will implement and deliver high...requirements. - Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis /timing clean design with constraints. - Perform lint and… more
- NVIDIA (Santa Clara, CA)
- …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams..., Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track… more
- Amazon (Sunnyvale, CA)
- …provide low-latency, high-speed broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and ... verification methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet… more
- NVIDIA (Santa Clara, CA)
- …NICs, Switches on standard FPGA prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa ... Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you...RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR...synthesis and publications. As you grow into more senior roles, you will use your knowledge of different… more
- NVIDIA (Santa Clara, CA)
- …of ASIC design flow including RTL design, verification, logic synthesis , prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. + ... We are now looking for a Logic Design Engineer with Physical Design background! As a member...working closely with the physical design team on implementation, synthesis and timing closure as well as working on… more
- NVIDIA (Santa Clara, CA)
- …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis and bringup. + Strong interpersonal skills and an excellent… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design, and methodologies including synthesis , place and… more
- quadric.io, Inc (Burlingame, CA)
- …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of the ... Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or...FPGA design is a plus + Experience in logic synthesis and performance modeling Nice to haves: + Familiarity… more