- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and...simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different… more
- NVIDIA (Santa Clara, CA)
- …understand the world. NVIDIA is seeking a Senior Cloud Service Provider (CSP) Application Engineer to join our team. In this role, you will collaborate with ... deployment. + Solid understanding of x86 server architecture, PCIe, DDR , Infiniband and high-speed interconnects + Basic understanding of...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a ... for NVIDIA CPUs and SOCs. What You Will Be Doing: + Analyze future DDR /LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the art and ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...Experience with physical layer of interconnects such as Memory ( DDR , LPDDR etc..) , PCIE , SerDes + Experience… more
- General Motors (Mountain View, CA)
- …processes to support the development of next-generation automotive systems. The engineer will lead product development and integration activities, focusing on ... signal paths, ensuring adherence to specifications for interfaces like DDR , PCIe, USB, SerDes, and Ethernet. + Evaluate and...reasonable accommodation to assist with your job search or application for employment, email (###@GM.com) us or call us… more
- Microsoft Corporation (Mountain View, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Verification Engineer ** to join the team. **Responsibilities** + Establish ... following: + DFD, JTAG, and debug protocols + Memory Controller/PHY IPs, DDR protocols, and related firmware/BIOS/MRC + CPU cores, protocols, and related firmware… more
- Microsoft Corporation (San Jose, CA)
- …and sustainability related to Microsoft cloud hardware. We are looking for a ** Senior Hardware Engineer ** with a dedicated passion for customer focused ... for ASICs or FPGAs. + Understanding of standard hardware interfaces, ie PCIE, DDR , Ethernet, I2/3C, UART, etc. + Experience with standard development tools for… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification Team! At NVIDIA, we have ... programming experience + Prior Design or Verification experience of dynamic memory controllers ( ddr {2, 3, 4, 5}, lpddr{2, 3,4,5, 6}) + Strong debugging and problem… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... Z2 or Zebu equivalent prototyping platforms.** + A strong understanding of PCIE, DDR , Ethernet, and Networking Protocols. + Proficiency in prototyping ARM or RISCV… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface modeling to ... and evolve I/O interface timing signoff, including external interface modeling (eg, DDR , PCIe, LPDDR) and clock/data alignment constraints. + Work closely with RTL… more
- NVIDIA (Santa Clara, CA)
- …for statistical large data analysis + Experience with PC architecture, AGP/PCIe busses and DRAM/ DDR is a plus Ways to Stand Out from the Crowd: + Some understanding ... You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) . Applications for this job will be accepted at least until September 23,… more
- Amazon (Cupertino, CA)
- …overall technical architecture and engineering practices. You'll provide leadership in the application of new technologies to servers in a continuous effort to ... reliability, performance, and/or cost - Experience with CPU architecture, RAS, DDR Memory technology, system performance, security and troubleshooting. - Repeated… more
- Amazon (Cupertino, CA)
- …validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our platform development team, you will have the outstanding and ... within AWS datacenter's world leading technology. The HBM lead Engineer will need to independently work with vendors, understand...data in the fleet. Key job responsibilities As a senior member of the team, you will join a… more