- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** RF PA design engineer Broadcom WSD (Wireless Semiconductor Division) is looking ... for an experienced RF Power Amplifier Design Engineer to join our team. As...award agreements. Broadcom offers a competitive and comprehensive benefits package : Medical, dental and vision plans, 401(K) participation including… more
- Meta (Sunnyvale, CA)
- …III-V material physics, especially LEDs and microLEDs 21. Expertise in advanced semiconductor packaging technologies such as COWOS, wafer reconstitution, InFO, ... We are looking for a highly skilled and driven Semiconductor Display Product Test Engineer to join...improve device integration process. You will work cross-functionally with design , systems, packaging , and other XFN teams… more
- Broadcom (San Jose, CA)
- …an experienced IC Packaging Engineer to drive next-generation package architecture, design , and productization using advanced node silicon (7nm, 5nm, ... please Sign-In before you apply.** **Job Description:** **IC / Semiconductor Package Designer** **Role Overview** We are...technology + Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools. + Experience working with… more
- Capgemini (Santa Clara, CA)
- Lead Electronics & Semiconductor Engineer At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, ... the same. **Senior Manager 2 - Lead Electronics and Semiconductor Engineer ** **About the Role** Join our...Join our Center of Excellence as a **SOC** **Solution Engineer ** , where you will **architect, design ,… more
- IBM (San Jose, CA)
- …software engineerng and computational skills towards state-of-the-art chip architecture, design , fabrication and advanced chip packaging . Background knowledge ... of computer science, data science, machine learning or other computational techniques are ideal skills for this role. Interns are expected to have the ability to analyze complex problems and apply creative solutions. **Required technical and professional… more
- Texas Instruments (Santa Clara, CA)
- …of innovation in High Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC / IGBT, Super Junction MOSFET technologies ... + Hands on high voltage package and power module design , materials, equipment,...at international conferences or symposiums related to power electronics, semiconductor packaging , or high-voltage technologies **Base Range… more
- Teledyne (Milpitas, CA)
- …the excitement of being on a team that wins. **Job Description** **Senior Packaging Engineer ** **Location:** Milpitas, CA or Garland, TX (On-site) **Your Role ... in the Company** As a Senior Packaging Engineer at Teledyne HiRel Electronics, you'll...future of aerospace and defense electronics. You will lead packaging design initiatives, ensuring our products meet… more
- SanDisk (Milpitas, CA)
- …RESPONSIBILITIES: + As a Packaging Engineer , you will work in the Packaging R&D group on thermal designs across semiconductor packaging level, flash ... experience required in thermal modeling and measurements of IC packaging and related areas. + A strong background in...simulation for feasibility and validation of concepts and provide design solutions to support new package technology… more
- Texas Instruments (Santa Clara, CA)
- …to help with the design , development, and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and embedded ... cross-functional teams to develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip,...Put your talent to work with us as a Packaging Engineering Intern ! **Why TI?** + Engineer… more
- Broadcom (San Jose, CA)
- …to automate the interposer design flow + Previous experience at semiconductor or advanced packaging companies. Educational Background: + Bachelor's in ... is required. Technical Skills & Experience: + Experience with interposer and advanced packaging design , including CoWoS, 2.5D/3D + Proficiency with EDA tools… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a passion for innovation and a proven track record of success in the semiconductor industry. The engineer will design and implement 3DIC-compatible flows ... exploration. MSA - Si, Pi, Thermal and stress/fatigue analysis Package design using Cadence APD, including IC...are looking for a highly skilled and motivated 3DIC Design Flow Engineer to implement system planning… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking an experienced IC package - design engineer for complex flip-chip-BGA packages for ... and thermal, in partnership with our experienced team of package engineering experts. + Package Design...that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions. For more information please… more
- Applied Materials (Santa Clara, CA)
- …for Applied Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary ... be working with a highly capable international team to develop advanced photonics packaging solution. You will lead optomechanical design , optical sub-assembly … more
- Applied Materials (Santa Clara, CA)
- …or other silicon photonics fab. + Strong knowledge on high speed optoelectronics device design + Good knowledge on CMOS semiconductor process + Good knowledge on ... new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our... semiconductor wafer backend and package ecosystem + Good knowledge on EDA or EPDA… more
- Broadcom (San Jose, CA)
- …and technically strong engineer to join our team. Job Description: Layout design of digital high-performance blocks Timing closure of the blocks with best PPA ... The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are… more
- Broadcom (San Jose, CA)
- …AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team. Layout design of digital high-performance blocks + ... trade-offs and performance implications of different cell architectures + Collaborate with design and layout engineers to optimize layout for area and performance +… more
- Applied Materials (Santa Clara, CA)
- …+ Design , develop, and optimize gas box systems for semiconductor manufacturing. + Ensure compliance with industry standards (eg, SEMI, ASME, NFPA). ... Education: Master's in Mechanical Engineering / Bachelor's Experience: 5+ years in semiconductor gas delivery systems. Technical Skills: Mechanical Design &… more
- Broadcom (San Jose, CA)
- …technologies in the industry encompassing 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next generation ... interfaces. The job requires aspects of a successful layout engineer , an electrical background, a strong interest in 2.5D...This is an exciting opportunity to develop new ideas, design the next generation of leading edge ASIC products,… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , 3D Technology, PhD, University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... and its integration within AI/ML-driven systems. As a Physical Design Engineer in 3D Technology, you will...platform for custom, high performance ASIC's and SoC's, from design through manufacturing, packaging , and test. +… more
- Applied Materials (Santa Clara, CA)
- … and display sectors. **Role Overview** We are seeking a skilled Software Engineer to design and develop digital tools and applications that accelerate ... advanced semiconductor technologies. **Responsibilities:** **Application Development for Semiconductor Process Development** + Design and implement digital… more