- Conductor (San Jose, CA)
- …programming skills in C++/SV, scripting languages like Python/Perl. Familiarity with Formal Verification . DMS Verification experience or knowledge ... San Jose, California, United States Overview The ACD Design verification team independently verifies the ASIC designs against standardspecifications. This gives an… more
- Medium (San Jose, CA)
- …Computer Engineering, or equivalent. 8+ years as a firmware/HW/SoC architect or senior embedded firmware engineer . Proven experience with multiple embedded ... and justify tradeoffs across HW/FW/SW; collaborate with ASIC/SoC, digital design, verification , board, and systems teams. Bring up RTOS (selection, BSPs, drivers,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance ... Computing Solutions. As a Formal Verification Engineer , you will play a key role in ensuring the functional correctness and completeness of our next… more
- NVIDIA (Santa Clara, CA)
- …the team and see how you can make a lasting impact on the world. As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of ... position, your responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure… more
- Microsoft Corporation (Mountain View, CA)
- …and sustainability related to Microsoft cloud hardware. We are looking for a Senior Design Verification Engineer for customer focused solutions, insight ... optimize the Cloud infrastructure. We are looking for a Senior Design Verification Engineer to...Working knowledge of writing assertions, coverage and / or formal verification . + Knowledge of industry standard… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... in industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage metrics, profiling tools, X prop, etc.… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing RAMs at leading edge process nodes ... verification of innovative circuits. + Support designer efforts in running formal verification , electronic rule checking, and other verification flows. +… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Verification Engineer ** to join the team. **Responsibilities** The role ... work + Experience with PCIe subsystems + Experience with the use of formal verification methods + Experience in RTL design for FPGA or emulation + Experience… more
- NVIDIA (Santa Clara, CA)
- …experience with various stages in the ASIC design flow including functional and formal verification , emulation, synthesis & timing analysis, power estimation and ... NVIDIA is looking for a Senior ASIC Design Engineer for our...for micro-architecture and design including RTL design, synthesis, functional verification , and timing analysis using groundbreaking CAD tools and… more
- NVIDIA (Santa Clara, CA)
- …Strong proficiency in micro-architecture and RTL development using Verilog. + Experience with formal verification using JasperGold is a plus. + Deep expertise in ... We are now looking for a Senior ASIC Design Engineer - DFX...groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's… more
- NVIDIA (Santa Clara, CA)
- …of our Memory Subsystem Design team, you will collaborate with architects/design verification / formal verification /physical design team to deliver a ... NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of… more
- NVIDIA (Santa Clara, CA)
- …based SOCs + Prior hands-on experience in Ada/SPARK programming (including specification and formal verification ) and TLA+ formal verification modeling ... We have an exciting opportunity for a talented Senior System Software Engineer to join...strong C and/or Ada/SPARK programming skills, and experience with formal methods, we want to hear from you! Join… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... a fully verified, synthesis/timing clean design. + Collaborate with architects, verification engineers, formal engineers, physical design engineers, and software… more
- Lockheed Martin (Sunnyvale, CA)
- …does this role look like?** Lockheed Martin is seeking a dynamic, hardworking Systems Engineer to support our SPP programs\. As a Systems Engineer , you will: ... responsible for supporting standard systems engineering processes or requirements, CONOPS, Verification and Validation and Mission Engineering \(ME\) * Support the… more
- NVIDIA (Santa Clara, CA)
- …using various flows and methodologies including: Static Timing analysis, EM and IR analysis, Formal Verification At NVIDIA, we have been at the forefront of ... We are now looking for a Senior SRAM Engineer ! The Full Custom Macro team at NVIDIA designs specialized RAM implementations for NVIDIAs wide array of processing… more
- Palo Alto Networks (Santa Clara, CA)
- … formal methods, and silicon bring-up. + **Collaborate** with verification engineers to debug complex scenarios, close coverage, and add design-for-debug ... with DDR5 memory, Ethernet (IEEE 802.3), or search-algorithm accelerators. + Formal - verification ownership. + Hands-on silicon validation and lab bring-up.… more
- Capgemini (Santa Clara, CA)
- …(Python, TCL). + Strong grasp of **functional coverage** , simulation, emulation, and formal verification . + Proven ability to **lead teams** , **influence ... days are the same. ** Senior Manager 2 - Lead Electronics and Semiconductor Engineer ** **About the Role** Join our Center of Excellence as a **SOC** **Solution … more
- LinkedIn (Mountain View, CA)
- …AI lifecycle. Responsibilities + Drive GenAI Safety Strategy: Serve as the senior technical leader shaping the company's generative AI safety direction. Define the ... scalable innovation. Basic Qualifications: + 2+ years as a Technical Lead, Staff Engineer , Principal Engineer , or equivalent. + 5+ years of industry experience… more
