• Digital Implementation and Signoff,…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure , and turn their design concepts into reality. The greater your powers, ... of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure , and timing/power signoff + Guide customers on how to best utilize… more
    Cadence Design Systems, Inc. (12/02/25)
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  • Principal ASIC Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    Principal ASIC Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
    SpaceX (12/22/25)
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  • Principal FPGA Electrical Engineer

    Oracle (Santa Clara, CA)
    system and FPGA designs meet specifications._ + _Collaborate with internal firmware/ software teams on implementing system level diagnostics._ + _Bring up and ... **_Oracle's West Coast Hardware Development_** _organization seeks to add a Principal FPGA Electrical Engineer to work with our FPGA, electrical, mechanical,… more
    Oracle (11/25/25)
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  • Principal Reg Compliance Specialist

    J&J Family of Companies (San Jose, CA)
    …member of the Johnson & Johnson Family of Companies is recruiting for a ** Principal Regulatory Compliance Specialist** ! This position will be located in San Jose, ... and/or support as needed in root cause investigations and quality systems and compliance improvements that results from Internal/External Audits, management reviews… more
    J&J Family of Companies (01/10/26)
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  • Principal ASIC Design Verification Engineer…

    Palo Alto Networks (Santa Clara, CA)
    …for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers + Define new tools ... days per week. **Your Impact** + Collaborate with engineers in software , architecture, design, and verification teams to create comprehensive pre-silicon… more
    Palo Alto Networks (12/10/25)
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  • Senior Quality Engineer - Virtual Machine Monitor

    Broadcom (Palo Alto, CA)
    …a deep understanding of processor architecture and low-level OS kernel internals, system software including memory management, resource management, and interrupt ... main operating system concepts: CPU, Memory, networking/storage stack, drivers, file systems , I/O hardware, etc. + Familiarity with one of the major server… more
    Broadcom (11/25/25)
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  • ASIC Chip Lead

    Broadcom (San Jose, CA)
    …coverage closure + Work with physical design team on design constraints and timing closure + Work with firmware and systems team and help with bring-up on ... Description:** Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of...ASIC Chip Lead to lead the development of cutting-edge System -on-Chip (SoC) solutions. This key role requires a deep,… more
    Broadcom (12/16/25)
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