• Micron Technology, Inc. (San Jose, CA)
    …the world to learn, communicate and advance faster than ever. As an Electrical Design Engineer in the Systems Integration Group SIG at Micron Technology, you ... and electronic load instruments. **What Sets You Apart:** + Familiarity with digital design including microcontrollers and FPGA devices + Understanding of common… more
    DirectEmployers Association (10/27/25)
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  • Micron Technology, Inc. (San Jose, CA)
    …development and integration. Validation occurs across multiple environments, including simulation, FPGA prototyping, and prototype hardware. If you have a keen ... mass storage SSD controllers. You will support verification efforts for design integrity, reliability, and performance requirements of Solid State Drives targeted… more
    DirectEmployers Association (10/21/25)
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  • Lead Principal Electrical Design

    Micron Technology, Inc. (San Jose, CA)
    …teamwork, creativity, and pushing boundaries! We're looking for a Principal Electrical Design Engineer Lead who's passionate about driving innovation in memory ... develop analog circuits, including system and POL power supplies. + Lead FPGA design using HDL and coordinate component selection and schematic development. +… more
    Micron Technology, Inc. (10/27/25)
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  • Senior FPGA Design Engineer

    GE Aerospace (San Ramon, CA)
    …sustainable flight and believe in our talented people to make it happen. The Senior FPGA Design Engineer will play a critical role in designing, developing, ... custom logic designs into cutting-edge aerospace products. Your expertise in digital design , verification, and FPGA /ASIC development will contribute to the… more
    GE Aerospace (11/13/25)
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  • Senior Principal Emulation Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …make an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the ... development of full-system design verification environments. This role focuses on developing and...with emulation platforms: + Palladium, Protium, Zebu, HAPS, Veloci, FPGA + Deep understanding of verification flows and emulation… more
    Cadence Design Systems, Inc. (11/18/25)
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  • FPGA Design Engineer

    Arrow Electronics (San Jose, CA)
    **Position:** FPGA Design Engineer **Job Description:** Principal Accountabilities * RTL development for ASIC / FPGA * Responsible for completion of ... front end design flow (spec to RTL / Netlist) * **Annual Hiring Range/Hourly Rate:** $92,200.00 - $203,500.00 Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill… more
    Arrow Electronics (11/14/25)
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  • ASIC Design Verification Engineer

    Google (Mountain View, CA)
    ASIC Design Verification Engineer , Devices and Services _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... unparalleled performance, efficiency, and integration. As an Application-Specific Integrated Circuit (ASIC) Design Verification Engineer , you will be part of a… more
    Google (10/04/25)
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  • Staff ASIC Design Verification…

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer , Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes and ... scripting languages, Software (SW) development frameworks and their impact on Design Verification (DV). + Experience creating and using verification components and… more
    Google (10/01/25)
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  • Senior CPU Design Verification DevOps…

    Google (Mountain View, CA)
    …Verification team. + Develop and manage large-scale regression flows for simulation, emulation, Field-Programmable Gate Array ( FPGA ) platforms, including ... Senior CPU Design Verification DevOps Engineer _corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more **Mid** Experience… more
    Google (10/24/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * Knowledge of AXI, DFI protocols* Working knowledge of memory controller ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Senior ASIC Engineer , IP Design

    Google (Mountain View, CA)
    Senior ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
    Google (11/06/25)
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  • Principal FPGA Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for ... in Electrical Engineering with 5+ years of experience + Experience with FPGA design and verification using Verilog + Experience with high end Xilinx(AMD) FPGAs… more
    Cadence Design Systems, Inc. (11/07/25)
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  • DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …front-end coding, scripting and developing flows at all phases of the digital design and functional verification. It is further expected that the candidate will be ... well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate...and be self-motivated and well organized. + Experience with FPGA and/or emulation platform is a plus. + Firmware… more
    Cadence Design Systems, Inc. (10/17/25)
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  • ASIC FPGA Design and Verification…

    The Boeing Company (Mountain View, CA)
    …Intelligence & Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior) to ... Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Engineer on the Boeing Electronic Products team you will develop… more
    The Boeing Company (11/13/25)
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  • Lead Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …on memory subsystem verification and/or performance analysis . Knowledge of System Verilog and FPGA design . Knowledge of AXI, DFI and MIPI protocols . Working ... Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to… more
    Cadence Design Systems, Inc. (10/04/25)
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  • Principal, Signal Integrity, Design

    Celestica (San Jose, CA)
    …highly motivated and self-driven candidate qualified for the position of Signal Integrity Engineer to help design and build market leading Hardware Platform ... Solutions. The Signal Integrity Engineer will play a critical role as the subject...designs. They will also be expected to help with design review of critical PCBs for signal integrity concerns.… more
    Celestica (10/07/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the ... Protium FPGA -Based Prototyping product which is used by leading CPU/GPU/HyperScaler...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
    Cadence Design Systems, Inc. (09/30/25)
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  • Senior Linux Kernel Engineer , Engineering…

    Google (Mountain View, CA)
    Senior Linux Kernel Engineer , Engineering Productivity, Google Pixel _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, ... software products, and 1 year of experience with software design and architecture. + 3 years of experience working...software for test and measurement equipment. + Experience with FPGA (eg, Xilinx toolchain, Petalinux). + Knowledge of AI/Machine… more
    Google (11/06/25)
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  • Software Engineer I

    Cadence Design Systems, Inc. (San Jose, CA)
    …and enable the products. We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with the interactions of a complex ... position is a highly visible function to bridge and gate -keep the full integration, validation, and characterization of ASIC,...validation, and characterization of ASIC, HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle. The same… more
    Cadence Design Systems, Inc. (10/08/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …Proficiency in Python and/or Perl for scripting and automation. + Experience with FPGA design , implementation, and debug tools. + Expereince in leveraging ... Microsoft cloud hardware. We are seeking a motivated **Senior** **Verification Engineer ** who is enthusiatic about cutting-edge hardware acceleration and eager to… more
    Microsoft Corporation (10/31/25)
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