- Eridu Corporation (San Francisco, CA)
- …the first augmented reality contact lens). Responsibilities Provide technical leadership for PCIe microarchitecture and RTL execution, ensuring robust design and ... adherence to performance, power, and area goals. Develop high-performance PCIe buffering, schedulers, and protocol engines. Own RTL development, including… more
- Eridu Corporation (San Francisco, CA)
- A technology startup in San Francisco is seeking a PCIe Lead Engineer to provide technical leadership in microarchitecture and RTL execution. Candidates ... should have an MSEE and over 15 years of ASIC/SoC RTL design experience, specifically in PCIe protocol design. You will develop high-performance PCIe … more
- Quix Recruitment Group Ltd (San Francisco, CA)
- …performance, efficiency, and functionality across complex hardware systems. They are seeking an RTL Design Engineer to join their hardware development team. This ... is critical for translating architectural specifications into robust, synthesizable RTL designs and collaborating across architecture, verification, physical design,… more
- Kubelt (Alameda, CA)
- …on via Science Foundry. We are seeking a highly skilled and motivated FPGA/Firmware Engineer to join our team and take ownership of architecting and building the ... is ideal for candidates passionate about end-to-end product development, from RTL design to embedded firmware and who thrive in high-ownership, cross-disciplinary… more
- SQL Pager LLC (San Jose, CA)
- …SERDES (Serializer/Deserializaer) based protocols, and must possess recent work experience with PCIe Rev.3, 4 and 5 protocol Minimum Qualifications: 1. BSEE / BSCS ... Xilinx Chipscope, Altera Signalscope, Lattice Reveal) 7. Design with RTL coding in Verilog and VHDL is a must...transaction and upper layers of the OSI protocol): a. PCIe Gen3/4/5 12. Experience with the PCI-SIG Compliance Tests… more
- Eridu Corporation (San Francisco, CA)
- …reality contact lens). Position Overview We are hiring multiple positions from Sr. Engineer to Principal Engineer . We are looking for a highly experienced ... of complex multi-die systems integrating high-speed interconnects such as UCIe, SerDes, PCIe , and Ethernet PHYs. This position offers the opportunity to work on… more
- Broadcom Inc. (San Jose, CA)
- A leading semiconductor company in San Jose is seeking a Physical IC Design Engineer to drive next-generation AI and ML ecosystems through PCIe Switch Products. ... This role requires a strong background in Physical Design, including execution of design, verification, and timing closure. The ideal candidate must have a Bachelor's degree in Electrical or Electronics Engineering and at least 8 years of experience. The… more
- Amazon (San Francisco, CA)
- …you develop into a better‑rounded professional. Basic Qualifications Electrical/Computer Science engineer 5+ years of experience with RTL verification Knowledge ... of the following programming languages: Perl, Bash, Tcl, Python Knowledge of PCIe , Processors, Ethernet, DDR Our inclusive culture empowers Amazonians to deliver the… more
- Eridu Corporation (San Francisco, CA)
- …timing and power analysis, to validate the ASIC design before tape‑out. RTL Coverage Analysis: deliver detailed coverage metrics to assess the thoroughness of ... debugging skill is a plus. Domain Knowledge: Prior experience with Ethernet and PCIe Protocols, Serial and Parallel VIP verification modes and High speed Serdes is… more
- SQL Pager LLC (San Jose, CA)
- Job Description: Define block level micro-architecture and write design specification RTL implementation of the specification while meeting power, area, timing ... field 10 years of industrial experience in ASIC Design Experience in micro-architecture and RTL design of complicated blocks Proficient in RTL design using HDL… more
- Liberty Personnel Services, Inc. (Palo Alto, CA)
- Overview Senior RTL /Chip Design Engineer - Architect the Future of AI Hardware Are you ready to push the boundaries of chip design at the cutting edge of ... AI and machine learning techniques Develop, test, and validate high-performance RTL designs that integrate seamlessly into next-gen semiconductor systems Contribute… more
- Broadcom Inc. (San Jose, CA)
- Physical IC Design Engineer page is loaded## Physical IC Design Engineerlocations: USA-California-San Jose-1320 Ridder Park Drivetime type: Full timeposted on: ... you apply.**## **Job Description:**Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves working… more
- Etched.ai, Inc. (San Jose, CA)
- Post-Silicon Validation Engineer About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only ... Job Summary We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for… more
- TechDigital Group (Mountain View, CA)
- …YOE) Experience with high Speed Serial or wide parallel interfaces such as D2D, Ethernet/ PCIe /USB or DDDR PHY IPs (5+ YOE) Analog and Mixed-signal IPs such as ... Client's, Bandgaps, Power Regulators (5+ YOE) Run tests on RTL and Gate Level Netlists, debug failures to root...checkers, coverage, and other verification collateral. Run tests on RTL and Gate Level Netlists, debug failures to root… more
- Credo Semiconductor, Inc. (San Jose, CA)
- …Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe /CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all ... Connect. About the Role As a Senior Physical Design Engineer , you will manage all aspects of physical design...and drive top-level, IP, and block-level physical implementation from RTL to GDSII. Focus on timing, power, and area… more
- Lattice (San Jose, CA)
- …LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer , you will have an opportunity to learn and train yourself on how to ... plans for certain IP, bench hardware and software. Develop test logic RTL to achieve intended validation/characterization test. Drive new silicon product bring-up,… more
- Advanced Micro Devices (San Jose, CA)
- …verification, and validation teams. KEY RESPONSIBILITIES: Excellent working knowledge of RTL -based design flows Strong knowledge of firmware and hardware interaction ... validation PREFERRED EXPERIENCE: Familiar with industry standards such as Ethernet and PCIe is a plus Strong analytical and problem‑solving skills with pronounced… more
- Cadence Design Systems (San Jose, CA)
- Senior Principal Emulation Design Engineer page is loaded## Senior Principal Emulation Design Engineerlocations: SAN JOSEtime type: Full timeposted on: Posted ... an impact on the world of technology.**We are seeking a highly skilled**Design Engineer ** to join our Palladium Solutions Development team, to drive the development… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves working ... driving next generation Artificial Intelligence and Machine Learning ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …MS.or PhD degree in Computer Science, Engineering, or related fieldStrong RTL and Testbench debug skillsExperience in synthesizable coding styleExperience in writing ... and asynchronous interfacesKnowledge of the FPGA development process & tool flow from RTL to bitstream for Xilinx and/or Altera productsHands on experience with lab… more
