- Google (Mountain View, CA)
- …Engineering or equivalent practical experience. + 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power... code, performance and power, as well as low-power design techniques. + Experience with a scripting language like… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Fabric Design ** ** Engineer ** to join the team. **Responsibilities** + ... configurable IPs + Be responsible for all aspects of the design flow including microarchitecture, RTL coding, Lint, CDC, timing closure, etc + Collaborate with… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Silicon Logic Design Engineer ** to join the team. **Responsibilities** ... In this role, you will be an integral part of the Logic Design Team, contributing to micro-architecture implementation, RTL coding, IP and subsystem development,… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer ...our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP ... Doing:** + Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. +… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in silicon design , is seeking a Senior Hardware Design Engineer - SoC Integration to join their team. As a Senior Hardware ... which will align successfully in the organization. **Job Title:** Senior Hardware Design Engineer -...to 50% of daily tasks. + Develop and implement RTL designs using SystemVerilog for digital IPs. + Perform… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - ... + Write micro-architecture specifications and participate in reviews. + Implement Verilog RTL to meet timing, performance, and power requirements. + Contribute to… more
- Cisco (San Jose, CA)
- Senior Emulation Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1430607) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- quadric.io, Inc (Burlingame, CA)
- …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of ... the processor design cycle. Requirements + Contribute to the definition of...by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Siemens (Fremont, CA)
- …Req ID: 468177 Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around the world to develop ... the increasingly complex world of chip, board and system design . The Story There is a unique opportunity to...for an experienced Place & Route user or Applications Engineer to play a critical role in our US-based… more