- Twist BioScience (South San Francisco, CA)
- The Sr Quality Engineer is responsible for ensuring the quality and safety of our genomic products and services by implementing and maintaining a quality management ... to the R&D team on quality matters, including design control, process validation , and change control.Conduct audits and inspections to verify compliance with QMS… more
- Twist BioScience (South San Francisco, CA)
- Instrument Software Engineer - (onsite in South San Francisco)Job DescriptionWe are seeking a skilled Instrument Software Engineer to join our manufacturing ... issues. We're looking for a self-motivated, fast-learning, and detail-oriented engineer with strong familiarity in lab instrumentation and a passion… more
- Micron Technology, Inc. (San Jose, CA)
- …with post silicon activity such as providing training on product validation and implementing design fixes under constraints + Experience with CMOS BSIM model ... memory products. **Position Overview** The Senior Member of Technical Staff Design Engineer in Micron's NVEG organization contributes to the development of new… more
- Meta (Burlingame, CA)
- …intersection of silicon , hardware, software, and content. The Reality Labs team seeks a Silicon Validation Engineer .As a Silicon Validation ... the effort to ensure high-quality silicon delivery. **Required Skills:** Silicon Validation Engineer , Reality Labs Responsibilities: 1. Assist in the… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in cutting-edge technology, is seeking a Silicon Validation Engineer (Mid to Senior Level) to join their team. As a Silicon ... mindset which will align successfully in the organization. **Job Title:** Silicon Validation Engineer (Mid to Senior Level) **Location:** Mountain View,… more
- Google (Mountain View, CA)
- Silicon Validation Engineer _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... field, or equivalent practical experience. + 3 years of experience in silicon validation , verification, or a related field. + Experience with a scripting… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Companies to Work For. Role Description This is a full-time, on-site role for a Post Silicon Electrical Validation Engineer based in San Jose, CA, in the ... Cadence IP group. The engineer will be responsible for validating the electrical performance...responsible for validating the electrical performance of our internal silicon test chips, debugging silicon issues by… more
- Meta (Menlo Park, CA)
- …with experience in the Pre/Post Silicon Validation to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon ... data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Pre/Post Silicon Validation Responsibilities: 1. Work across all aspects of… more
- Google (Fremont, CA)
- …or SystemVerilog. + Experience of synthesis and static timing analysis. + Experience in silicon validation of ASICs, including the design and deployment of new ... Staff Silicon Design Engineer , Raxium _corporate_fare_ Google _place_ Fremont, CA, USA **Advanced** Experience owning outcomes and decision making, solving… more
- Google (Mountain View, CA)
- …blocks or components/parts to create product subsystems. + Engage with Verification and Silicon Validation teams to ensure functionality of the design. + Provide ... TPU Design Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, solving problems,… more
- Google (Mountain View, CA)
- Senior Silicon CAD Engineer _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer...Work across functional domains to enable the development and validation of complex CAD flows. + Drive EDA vendors… more
- Google (Mountain View, CA)
- Senior Signal and Power Integrity Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, ... correlation, including PMIC design concepts. + Experience with lab equipment for validation and debugging (eg, high-speed oscilloscope, TDR, VNA). + Experience with… more
- Microsoft Corporation (Mountain View, CA)
- …functions in an extremely efficient manner. We are looking for a **Principal Validation Engineer ** with expertise in one or more of the following ... debug/BU and tool development. You will be part of the Post- Silicon Validation team in the dynamic Microsoft Artificial Intelligence System on Chip… more
- Microsoft Corporation (Mountain View, CA)
- …functions in an extremely efficient manner. We are looking for a **Senior** ** Validation Engineer ** to work in the dynamic Microsoft Artificial Intelligence ... Chip (AISOC) Silicon team. You will be part of the Post- Silicon Validation team, driving many facets of high performance, high bandwidth designs. Microsoft's… more
- Cisco (San Jose, CA)
- …Perl or similar) + Prior experience with UVM and System Verilog. + Post Silicon functional validation or debugging experience is a plus. + Experience with ... location. **Meet The Team:** The Common Hardware Group (CHG) delivers the silicon , optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless… more
- Microsoft Corporation (Mountain View, CA)
- The Microsoft Silicon Engineering and Solutions Team within SCHIE is seeking passionate, driven and intellectually curious engineers to join our Central Front-End ... front-end areas like RTL & VIP Design, Design Verification, Validation , DFT, Emulation, Design Synthesis, RTL Power Anaysis, PD...our design engineers so that they can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and enable the products. We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with the interactions of a complex ... is a highly visible function to bridge and gate-keep the full integration, validation , and characterization of ASIC, HW/PCB, SW, FW, and FPGA subsystems in the… more
- Meta (Menlo Park, CA)
- … validation , and Program Management to deliver first-pass functional silicon . **Required Skills:** ASIC Engineer , Networking Architecture and Modeling ... **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for… more
- Google (Mountain View, CA)
- Senior Linux Kernel Engineer , Engineering Productivity, Google Pixel _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, ... the highest standards. Through the development of cutting-edge toolsets, robust validation methodologies, and technology development vehicles, our team enables the… more
- Broadcom (San Jose, CA)
- …for excellent QA engineers to join the NIC product team. As a Software QA Engineer , you will be responsible for validation of the RDMA protocol features for ... NIC. You will work cross functionally with marketing, architects, silicon development and the SW teams to document, test...scale testing. 3. Hands-on in test planning, automation and validation of RDMA protocol features to deliver high quality,… more
