• Analog/Mixed Signal Verilog Modeling Design…

    Broadcom (San Jose, CA)
    …such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs using SystemVerilog language. + Interface with analog design team and ... support analog/mixed signal models for chip verification. + Understand Verilog-AMS modeling language + Good knowledge of SystemVerilog UDT/UDR nettype (using Cadence… more
    Broadcom (01/13/26)
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