- Google (Mountain View, CA)
- …and education. About You In order to set you up for success as a Research Engineer at Google DeepMind, we look for the following skills and experience: ... you'll have the opportunity to revolutionise AI by applying state-of-the-art AI to Chip Design. We develop research breakthroughs that impact all aspects of… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, ... games, movie production, product design, medical diagnosis, and scientific research . Today, we stand at the beginning of the...most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify… more
- Tarana Wireless (Milpitas, CA)
- …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... strategies and execute plans at system or full chip level + Build and continuously improve verification...states. Tarana is headquartered in Milpitas, California, with additional research and development in Pune, India. Visit our website… more
- Meta (Sunnyvale, CA)
- …for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and integrate advanced IP and ... effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and Cross Functional Partner… more
- Google (Sunnyvale, CA)
- …and evaluate our data center systems, identifying product requirements and contributing to research and project planning. From the chip to chiller, you are ... of mechanical tolerances and tolerance analysis. + Knowledge of chip /socket/cooling solution stack-ups, structural behavior, and reliability. Our computational… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group > CPU Engineering **General Summary:** We are hiring a talented engineer for CPU System Debug Architecture/RTL engineer targeted for high ... power devices. In this role, you will work with chip architects to conceive of the micro-architecture and help...Perl or Python. **Roles and Responsibilities** As an Architect/RTL engineer you will own or participate in the following:… more
- Google (Sunnyvale, CA)
- …behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on ... systems. As a Machine Learning (ML) Hardware Architecture Modeling and Co-design Engineer , you will work with hardware and software architects to model, analyze,… more
- Siemens (Fremont, CA)
- …and physics to deliver better products in the increasingly complex world of chip , board, and system design Key Responsibilities - + Work with customers, engineers, ... managers to develop, debug, and enhance complex emulation environments for Silicon Verification and Validation + Expert point of contact for HAV (Hardware Assisted… more
- Teledyne (Milpitas, CA)
- …operation of your circuit via system level test with test hardware + Work with the verification engineer to validate your circuit in a whole chip simulation ... water quality environmental monitoring, electronics design and development, oceanographic research , deepwater oil and gas exploration and production, medical imaging… more
- Meta (Sunnyvale, CA)
- …success criteria. In this role, you will execute validation and verification activities for new product integration, including system-level and subsystem testing, ... and systemic issues, and drive resolutions. **Required Skills:** Hardware Systems Engineer Responsibilities: 1. Lead hardware and technology teams through all phases… more
- Amazon (Cupertino, CA)
- …several AWS tools used for building Generative AI on AWS. The Inferentia chip delivers best-in-class ML inference performance at the lowest cost in cloud. Trainium ... team covers multiple disciplines including silicon engineering, hardware design and verification , software and operations. The Neuron Compiler team is developing a… more
- Amazon (Cupertino, CA)
- …several AWS tools used for building Generative AI on AWS. The Inferentia chip delivers best-in-class ML inference performance at the lowest cost in cloud. Trainium ... The team covers multiple disciplines including silicon engineering, hardware design and verification , software and operations. The AWS Neuron team works to optimize… more
- Amazon (Cupertino, CA)
- …several AWS tools used for building Generative AI on AWS. The Inferentia chip delivers best-in-class ML inference performance at the lowest cost in cloud. Trainium ... The team covers multiple disciplines including silicon engineering, hardware design and verification , software and operations. The AWS Neuron team works to optimize… more
- Amazon (Cupertino, CA)
- …several AWS tools used for building Generative AI on AWS. The Inferentia chip delivers best-in-class ML inference performance at the lowest cost in cloud. Trainium ... The team covers multiple disciplines including silicon engineering, hardware design and verification , software and operations. The AWS Neuron team works to optimize… more
- Amazon (Sunnyvale, CA)
- Description Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a ... hard. Have fun. Make history. Key job responsibilities As a Senior Failure Analysis Engineer , you will be an expert in device failure analysis, with a strong ability… more
- Amazon (Cupertino, CA)
- …(Inf1/Inf2) our cloud-scale Machine Learning accelerators. This role is for a Machine Learning Engineer on one of our AWS Neuron teams: - The ML Distributed Training ... team works side by side with chip architects, compiler engineers and runtime engineers to create,...key. - ML Frameworks partners with compiler, runtime, and research experts to make AWS Trainium and Inferentia feel… more
- Google (Mountain View, CA)
- …checks. + Participate in test plan and coverage analysis of the sub-system and chip -level verification . Google is proud to be an equal opportunity workplace and ... of FPGA and emulation platforms. + Knowledge of ASIC Verification or DFT. Be part of a team that...Google AI, software, and hardware. Teams across this area research , design, and develop new technologies to make our… more
- Qualcomm (Santa Clara, CA)
- …for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer , you will work with chip architects to conceive of the ... and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. + RTL ownership.… more