- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Cisco (San Jose, CA)
- Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose, California, US + Area of ... systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and...primary focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design … more
- NVIDIA (Santa Clara, CA)
- …interconnect and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early ... seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC 's...What you will be doing: + Working with architects, design leads, physical design leads… more
- NVIDIA (Santa Clara, CA)
- …Design Engineers to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will contribute to designing multiple products ... doing: + Be an integral part of the System ASIC Design team to help with the...of several modules. + Integrate modules into the overall SOC design and work closely with other… more
- Google (Sunnyvale, CA)
- …. + Work separately and collaboratively to create and review ASIC / SoC subsystem design architecture and microarchitecture specifications. ... Engineer, you will play an important role in designing ASIC / SoC hardware for Artificial Intelligence (AI) and...to evaluate features and their impact. + Work with physical design teams to ensure design… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Cisco (San Jose, CA)
- …complex block, cluster or chip-level design + Lead verification for a complete SOC or ASIC i + Prior Experience with Forwarding logic/Parsers/P4 + Formal ... hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from...ASIC bring up **Minimum Qualifications:** + 10+ years ASIC design verification experience with a bachelor's… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design ...experience using Perl/Python, TCL, and Make 17. Experience with SOC Design Integration and Front-End Implementation 18.… more
- Cisco (San Jose, CA)
- …You'll Work With:** You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1443165) + Location:San Jose,...for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers… more
- Amazon (Cupertino, CA)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... requirements including software applications, use models, system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design … more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence...with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out… more
- Google (Sunnyvale, CA)
- …Computer Science, with an emphasis on computer architecture. + 10 years of experience in ASIC design with 3 years of experience working on security design . ... experiences, delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer, you will join a...to verify and debug RTL designs. + Work with physical design teams to ensure design… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of our customers. We ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip...* Should be able to work closely with IP Design teams and Backend Physical Design… more
- Amazon (Sunnyvale, CA)
- …as with the RTL/Arch. Teams Basic Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such as 5nm/7nm, ... that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a… more
- Qualcomm (Santa Clara, CA)
- …future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design ... be part of a team responsible for the complete Physical Design Flow and deliveries of complex,...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- Meta (Sunnyvale, CA)
- … integration and ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11. Experience in ... demonstrate and integrate advanced IP and AI accelerators into SOC / ASIC solutions to enable in-system testing and...collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs… more
- Qualcomm (Santa Clara, CA)
- …domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design and physical design teams to identify timing requirements ... design constraints to achieve timing closure of complex SoC cores. + Review and integrate HM constraints into...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- Qualcomm (Santa Clara, CA)
- …RF/Analog circuits for wireless products (eg, LNA's, PLL's) and 4+ years of ASIC design , verification, or related work experience. OR Master's degree in ... and develop complex radio frequency integrated circuits in complex SoC 's and discrete RFIC's. Perform radio signal path and...Electrical Engineering or related field and 4+ years of ASIC design , verification, or related work experience.… more
- Cisco (San Jose, CA)
- …foundries on installation and maintenance of process design kits (PDKs) for SOC physical design teams. + Experience working with Package and ... Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295)...Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification + Experience… more
- Microsoft Corporation (Mountain View, CA)
- …to develop test plans and ensure functional correctness + Interface with performance modeling, physical design , design for test, and other teams to optimize ... experience. + 4+ years of experience in digital logic design for ASIC or FPGA + 4+...linting, etc). + Demonstrated proficiency in Computer Architecture, Digital Design , CPU/ SoC design principles as… more