• Sr . SOC / ASIC

    SpaceX (Sunnyvale, CA)
    Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL ...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year… more
    SpaceX (06/19/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will...CHI + Familiar with OCP secure boot specification and physical security handling process + Possess design experience with… more
    NVIDIA (06/18/25)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... leading SoC 's and GPU's. This position offers you a unique...opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing… more
    NVIDIA (05/13/25)
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  • Sr . SOC Design - STA, Hardware…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. ... * Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip / Sub-System STA and… more
    Amazon (07/09/25)
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  • Sr SOC Physical Design…

    Amazon (Sunnyvale, CA)
    …with the RTL/Arch. Teams Basic Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such as 5nm/7nm, 14/16nm ... that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our customers. We are… more
    Amazon (06/05/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically...and Digital Systems design. + A deep understanding of ASIC design flow including RTL design, verification, logic synthesis,… more
    NVIDIA (05/02/25)
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  • Senior High-Performance ASIC Timing…

    NVIDIA (Santa Clara, CA)
    …plans for NVIDIA's next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. ... MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA...with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the… more
    NVIDIA (06/24/25)
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  • Sr . HBM PHY Expert, Annapurna Labs

    Amazon (Cupertino, CA)
    …validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our platform development team, you will have the outstanding and ... data in the fleet. Key job responsibilities As a senior member of the team, you will join a...the life A day in the life of an ASIC Engineer on the AWS Organization team focuses on… more
    Amazon (06/06/25)
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  • Senior Emulation Engineer

    Capgemini (Santa Clara, CA)
    …in Zebu platforms. **Your Role** **As an Emulation Engineer, you will:** + Port ASIC and IP RTL code to emulation platforms (Zebu). + Build models from released ... (Zebu) using SystemVerilog/Verilog/VHDL. + At least 2 years of experience porting ASIC /IP RTL to emulation platforms (Zebu). + Proficiency in Unix/Linux environments… more
    Capgemini (06/19/25)
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  • Senior Fabric Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Fabric Design** **Engineer** to join the team. **Responsibilities** + Be part of ... and ensure functional correctness + Interface with performance modeling, physical design, design for test, and other teams to...4+ years of experience in digital logic design for ASIC or FPGA + 4+ years of logic design… more
    Microsoft Corporation (07/12/25)
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  • Senior Product Test Engineer

    Cisco (San Jose, CA)
    Senior Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444763) + Location:San Jose, California, US + Area of InterestSupply Chain + ... As part of the team you will collaborate with ASIC design teams in the Central Hardware Group, peer...test efficiency and drive yield improvements. Collaborate with Design, SoC , DFT, Reliability, Quality, Failure Analysis and Manufacturing teams… more
    Cisco (07/11/25)
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  • Senior Design Verification Engineer

    Qualcomm (Santa Clara, CA)
    …plans and the functional verification on hardware at the IP, sub-system, SoC and system/architecture level for wireless and wired technologies using an ... called SystemVerilog in an OVM or UVM verification environment. Perform Physical and/or Mac Layer verification in developing the methodology architectural components… more
    Qualcomm (06/13/25)
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  • RF/Analog IC Design Engineer

    Qualcomm (Santa Clara, CA)
    …Define, design and develop complex radio frequency integrated circuits in complex SoC 's and discrete RFIC's. Perform radio signal path and circuit topology analysis ... wireless products (eg, LNA's, PLL's) and 4+ years of ASIC design, verification, or related work experience. OR Master's...of work experience in a role requiring interaction with senior leadership (eg, Director and above). **Principal Duties and… more
    Qualcomm (05/29/25)
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  • HBM PHY Expert, Annapurna Labs

    Amazon (Cupertino, CA)
    …validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our platform development team, you will have the outstanding and ... data in the fleet. Key job responsibilities As a senior member of the team, you will join a...the life A day in the life of an ASIC Engineer on the AWS Organization team focuses on… more
    Amazon (07/10/25)
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  • Director, Technical Standards - RISC-V Hardware

    Qualcomm (Santa Clara, CA)
    …and experience is a must. Debug and Trace, Reliability Availability Serviceability, SOC IP, bus, cache coherency, interrupt, system firmware and kernel knowledge are ... processor core and system compliance certification, modeling and verification. Additionally, physical design and government affairs background is a plus. **Minimum… more
    Qualcomm (06/13/25)
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