- Silvus Technologies (Irvine, CA)
- …creates a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer_** who will report to the _Director of ... research and development process from concept to field deployment. FPGA Design Engineers are responsible for the...RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and… more
- Silvus Technologies (Irvine, CA)
- …creates a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer- Signal Processing_** who will report ... Computer Science, or related fields. + Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL … more
- Silvus Technologies (Irvine, CA)
- …THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... exciting projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus'… more
- Silvus Technologies (Irvine, CA)
- …pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA ... research and development process from concept to field deployment. FPGA Design Engineers are responsible for the...RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and… more
- SpaceX (Hawthorne, CA)
- …Experience working with complex digital designs + Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, ... for versatile, driven, and collaborative engineers. As an Sr. FPGA engineer on the satellite digital design ...+ Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA /SoC platforms… more
- BrainChip, Inc. (Laguna Hills, CA)
- BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other… more
- SpaceX (Irvine, CA)
- …extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX...requirements and system limitations + Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level… more
