- Broadcom (San Jose, CA)
- …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... of what's possible! Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design . You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis, static timing...have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with… more
- Cisco (San Jose, CA)
- …center, metro, long-haul and ultra-long haul telecommunication networks. This role is within our ASIC team, specifically as part of the Design for Test group. ... Your Impact As a member of Acacia's ASIC team, you will set up and implement MBIST,...work with seasoned DFT engineers to implement and verify Design For Test. * You will also interact with… more
- Google (Mountain View, CA)
- …related field, or equivalent practical experience. + 5 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: + Master's degree or PhD in Electrical… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... micro-architecture specifications and participate in reviews. * Implement Verilog RTL to meet timing, performance, and power requirements. *...with 4+ years of ASIC design experience. * Prior experience working… more
- Cisco (San Jose, CA)
- …coverage through code and functional coverage implementation and review. * Qualify RTL design quality with Gate Level Simulations and support emulation ... in EE, CE, or other related field. * 5+ years of related ASIC design verification experience. * Proficient in ASIC verification using UVM/System Verilog.… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
- Cisco (San Jose, CA)
- …to all aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and a proven track ... what's possible! Your Impact As a diligent FPGA Prototyping Engineer with exceptional analytical skills, you excel in utilizing...our prototyping methodology * Option to engage in block-level RTL design or block or top-level IP… more
- Cisco (San Jose, CA)
- …most complex ASICs being developed in the industry. You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of the largest and… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments. Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. *… more
- Siemens (Fremont, CA)
- … design and technical direction for RTL synthesis tools within the digital ASIC design flow. + Define and evolve the architecture of RTL synthesis ... experienced and visionary Software Architect to lead the architectural design and technical direction of our RTL ...development , focus on delivering cutting-edge solutions for digital ASIC design . The ideal candidate brings 10… more
- Broadcom (San Jose, CA)
- …will be responsible for various key tasks in the areas of uArch and RTL design of cutting-edge network switch/routing Datapath designs. The day-to-day tasks for ... and working on initial floor plan. 4). Develop Verilog RTL . logic synthesis, physical implementation constraints, static timing analysis....standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... architecture. + 10 years of experience with digital logic design principles, RTL design concepts,...languages such as Verilog or SystemVerilog. + Experience with ASIC design methodologies for clock domain checks,… more
- Cisco (San Jose, CA)
- …ASICs being developed in the industry. Your Impact You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the… more
- Google (Mountain View, CA)
- …+ 4 years of experience verifying digital logic at Register-Transfer Level ( RTL ) using SystemVerilog for ASICs or FPGAs. + Experience verifying digital Intellectual ... Property (IP) and subsystems. + Experience in Design Verification (DV) Testbenches/Environments. Preferred qualifications: + Master's degree or PhD in Electrical… more
- Broadcom (San Jose, CA)
- …Tcl, Perl). + Proficiency in using synthesis tools (Genus) + Strong understanding of ASIC design flows, including RTL and place-and-route. + Excellent ... Description:** Broadcom is looking for a senior level STA engineer . In this highly visible role you will be...or Computer Engineering with 8+ years of experience in ASIC Design Verification or MS in Electrical… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip… more