• ATE Test Engineer

    Google (Mountain View, CA)
    …and mixed signal test and automation methodologies and support internal tools for ATE test program generation, test vector tracking, test program ... OTP programming, memory repair and validation methodologies and processes. + Experience with ATE test platforms and measurement equipment, with a preference for… more
    Google (05/22/25)
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  • Senior Silicon Product Engineer

    Google (Mountain View, CA)
    …you will help develop and deploy a comprehensive test solution using Automatic Test Equipment ( ATE ) for high volume manufacturing at FABs, OSATs that meets ... part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer... hardware design (eg, probe card, Load board) requirements, ATE / SLT test program review. +… more
    Google (04/22/25)
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  • Sr Product Test Development Engineer

    Cisco (San Jose, CA)
    …You're Impact You will be a Sr Product Test Development Engineer in Silicon Operations focusing on the ATE test bring-up including defining test ... with ASIC design teams in the Central Hardware Group, peer Test and Product Engineers in Silicon Operations, and with Cisco Systems NPI teams. Collaborate with… more
    Cisco (05/01/25)
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  • Senior Test Engineer

    Power Integrations (San Jose, CA)
    …specifications and DFT proposals. + Create test programs in C language, debug and validate silicon on ATE + Design test interface hardware for ATE + ... of test solution and improve cost of test . + Supports and is responsible for sustaining and...and skills with regard to software C++ programming + ATE experience on Mixed Signal Tester preferably on ASL1K… more
    Power Integrations (03/20/25)
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  • ASIC Design For Test Engineer

    Cisco (San Jose, CA)
    …* You will work with seasoned DFT engineers to implement and verify Design For Test . * You will also interact with RTL/PD/STA/ ATE , collaborating with them for a ... ASIC team, specifically as part of the Design for Test group. Your Impact As a member of Acacia's...with hierarchical ATPG and core wrapping techniques, ATPG and post- silicon DVT * Prior experience with Synopsys/Mentor DFT tools… more
    Cisco (03/21/25)
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  • ASIC Reliability Engineer

    Cisco (San Jose, CA)
    …components and modules, and reliability testing. * Statistical data analysis, ATE test data interpretation, device level electrical characterization, and ... * 10+ years of experience with the Semiconductor, manufacturing process, IC test methodologies, device reliability, silicon /package fail mechanisms and symptoms.… more
    Cisco (05/23/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    test quality of the products from Design to Production + Participate/contribute in silicon bring-up, characterization, and silicon test + Define and ... complex and cutting edge network switching ASIC DFx (Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing… more
    Broadcom (03/11/25)
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  • Staff Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    …analog circuits, device physics and IC fabrication processes. + Ability to interpret IC ATE test data log is required. Ability to interpret system level ... Job Description: The Staff Silicon Level Failure Analysis Engineer will...product failures in power supply applications and/or in production test . + Provide comprehensive technical reports to customers on… more
    Power Integrations (04/22/25)
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