- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ... **Summary:** Meta is hiring ASIC Methodology Engineers within our Infrastructure organization to work on design integrity and signoff methodology … more
- Amazon (Sunnyvale, CA)
- …Amazon Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design ... flows that improve the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's.… more
- Qualcomm (Santa Clara, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...joining Meta. 7. 3+ years hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 9. 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 10. 10+ years experience… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... across many NVIDIA teams from software, to architecture, design, methodology , and more. The GPU is used in applications...Strong communication and problem solving skills + Exposure to ASIC design, ASIC verification and computer architecture,… more
- Palo Alto Networks (Santa Clara, CA)
- …create an environment where we all win with precision. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall ... platforms. As a Senior Principal Engineer , you will take end-to-end ownership of complex modules...members. This role requires a deep technical background in ASIC design for networking applications and the ability to… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...the various partition blocks. 8. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis,… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....data-path intensive designs 24. Experience in the 3D-IC technology, methodology , and advanced packaging 25. Experience in validating Power… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...for Timing, Area, Power. 6. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC,). 7.… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... and contribute to defining, evolving, and supporting our prototyping methodology . + **Option to engage in block-level RTL design...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- NVIDIA (Santa Clara, CA)
- …experience) + 5+ years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading...across many NVIDIA teams from software, to architecture, design, methodology , and more. The GPU is used in applications… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, ... the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will...background developing TB's from scratch using SV and UVM methodology is desired. + C++ programming language experience, scripting… more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and drive ... understanding Arm-CPU/RISC core and NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC... methodology or C/C++ based verification 16. 5. ASIC development cycles 17. 6. IP/sub-system or SoC (System… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines ... including synthesis, design for test, floorplanning, place and route, clock methodology , power planning and analysis, timing closure, signal integrity and physical… more
- NVIDIA (Santa Clara, CA)
- …and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem ... timing environment, setting up constraints and defining the timing methodology for the next generation of designs. This includes...and clock controls in DFT modes. + Experience in methodology or flow development. NVIDIA is widely considered to… more