- Cisco Systems Inc (San Jose, CA)
- …fullchip timing in multiple timing modes Option to also do block level RTL design or block or top-level IP integration Helping develop efficient methodology to ... are received. Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets...systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance… more
- Cisco (San Jose, CA)
- ASIC Design Technical Leader - Design &...timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from… more
- Meta (Sunnyvale, CA)
- …technical sessions to track and follow up on issues. **Required Skills:** Silicon IP Technical Program Manager Responsibilities: 1. Serve as the primary point ... Qualifications:** Minimum Qualifications: 12. 10+ years of experience in silicon/ ASIC /firmware/ IP program management 13. Experience dealing with ambiguity… more
- Amazon (Sunnyvale, CA)
- …Blink and Ring camera products. Your team will be responsible for front-end digital design and verification of complex IP and SoC integration. This role provides ... Description As an SoC Manager , you will lead a team responsible for...work closely with product management, firmware, validation and other IP /integration teams. A successful candidate must have a track… more
- Amazon (Sunnyvale, CA)
- …ensuring Amazon's access to leading-edge manufacturing capabilities - Collaborate with silicon design teams to optimize die size, IP selection, and package ... help us create next? About the Role: As a Senior Global Commodity Manager specializing in Semiconductor Components, you will lead the technical and commercial… more
- quadric.io, Inc (Burlingame, CA)
- …in compiler strategies for data parallel processors such as GPUs, DSPs and ASIC design flows * Knowledge of end-to-end toolchain, including compilers, linkers ... Field Applications Manager (Worldwide) Location: Burlingame, CA Description If making...using our Chimera GPNPU (general purpose neural processor unit) IP for a wide range of products -- from… more
- Arrow Electronics (San Jose, CA)
- …timing** in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient methodology ... **What You'll Be Doing:** + Being a member of design team who oversees **fullchip SDCs** and works with...in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical… more
