- Enfabrica (Mountain View, CA)
- Physical Design Engineer Summary Join an...Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first ... silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated...full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture… more
- Coherent Corp. (Fremont, CA)
- …manufacturability and reliability. Collaborate with cross-functional teams consisting of Silicon Photonics, IC design , substrate layout, and module design ... at OSAT's. Work with OSAT's to define PIC and EIC hybrid integration packaging design rules, process flow , and material sets. Work with electrical socket and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …drive Pre-sales and Post-sales activities at advanced nodes for Cadence Digital IC products. Key Responsibilities + Provide technical support to Cadence customers in ... the areas of Digital Design Implementation & Signoff including...Cadence tools and technologies + Amend and augment the flow as needed using Tcl and/or other programming skills… more
- Power Integrations (San Jose, CA)
- …market transformation. Duties and Responsibilities + Develops and maintains PDKs. + Supports all IC design CAD tools such as Cadence schematic entry, mixed mode ... IC layout designers providing support for taping out physical designs and support device engineers developing PCELLs and...with Cadence VSR & EMIR + Understanding Semiconductor Process Flow + In-house CAD Support for worldwide Design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Science/Engineering, Electrical, Engineering, or related field + 12+ years of design /EDA experience (methodology, flow , implementation, RTL2 GDS) + Proven ... most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide...Cadence tools and technologies + Amend and augment the flow as needed using Tcl and/or other programming skills… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …in next engagements Job Requirements Minimum + 10+ years of industry Physical Design experience + BS degree Computer Science/Engineering, Electrical, ... and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts...guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills… more
- Qualcomm (Santa Clara, CA)
- …to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design , etc. + Knowledge of low power flow (power gating, multi-Vt ... Business Units. Minimum Skill/Experience: + 2-10 yrs experience in Physical Design and timing signoff for high...engineering with at least **2+ years of experience in IC design ** . + **Experience in leading… more
- Cisco (San Jose, CA)
- …workflows. + Experience working with one or more of the following physical design tools, such as Cadence, Innovus, Synopsys IC Compiler, or Fusion Compiler. ... Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295)...or full chip physical verification and/or owning Physical Verification CAD flow development and support.… more
- Amazon (Sunnyvale, CA)
- …and various DSP ISA - Experience debugging system-level issues - Experience in entire design flow from architecture to final silicon. - Good programming skills ... domains and power domains - Large breadth of knowledge from architecture through physical design - Knowledge of FPGA and emulation platforms - Knowledge of SoC… more
- Broadcom (San Jose, CA)
- …guidance to designers for fixing issues arising from LVS, ERC and DRC errors + Design automation flow support and development + Integration of flows and checks ... Candidate Account, please Sign-In before you apply.** **Job Description:** ** Design Automation Engineer** This position is part of a...part of a team tasked with the support of IC Designs for IPs and ASIC designs. Commitment to… more
- Amazon (Sunnyvale, CA)
- …Electrical Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality ... design teams. You will oversee the complete RTL-to-GDS flow , manage tool deployments, and drive methodology development across...an opportunity to shape the technical direction of critical IC design workflows and lead a team… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technology. Cadence Design Systems is looking for a highly motivated software or digital IC design engineer to work with the Innovus routing team in the ... team responsible for designing, developing, troubleshooting, debugging and supporting P&R design flow . Development responsibilities will include data-model and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC design and support role offers an opportunity to work on a ... ideal for someone with several years of hands on ASIC/ IC design experience who is looking for...requires strong technical capability in Cadence tools (or similar), flow development, and the ability to think outside of… more
- Siemens (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on Siemens EDA's DVT products… more
- Siemens (Fremont, CA)
- …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on Siemens EDA's DVT products and services. It… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes + Prior Designer, ... nodes + Industry experience with EDA tools in the IC digital implementation flow , preferably on Genus... Design and Synthesis, Formal Verification, Low Power design , Physical Design and Timing… more
- Broadcom (San Jose, CA)
- …industry for IP and chip design + Working knowledge of IP and chip design flow for analog and digital + Experience with parametric and yield data analysis. ... Working knowledge of 2.5D packaging technology and 3D stacked IC + Knowledge and use of various EDA offerings...extraction and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews &… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …+ Must have a deep technical knowledge and understanding of the digital design flow from RTL to GDSII including high-level synthesis, RTL synthesis, ... DFT, digital implementation, place and route, electrical signoff, and physical signoff. + Must have a proven track-record demonstrating...industrial, and medical markets. + An understanding of mixed-signal IC design and package design .… more
