• Lead CPU RTL Design

    Google (Mountain View, CA)
    …related field, or equivalent practical experience. + 8 years of experience in CPU or AI accelerator logic/ RTL design , including microarchitecture definition ... and PPA optimizations. + Experience with RTL language (System Verilog) and related design ...benefits at Google (https://careers.google.com/benefits/) . + Participate in developing CPU subsystem. Focus on Advance Branch prediction algorithm and… more
    Google (05/19/25)
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  • CPU Cache Subsystem Design Manager

    Google (Mountain View, CA)
    …of experience in high-performance CPU , cache subsystem or AI accelerator logic/ RTL design including microarchitecture definition and PPA optimizations. + 6 ... + Lead and manage a team of design engineers working on CPU , cache subsystem,...into SoC, emphasizing on microarchitecture and RTL design for the next generation CPU subsystem.… more
    Google (05/29/25)
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  • CPU Arithmetic Dataflow Design

    Google (Mountain View, CA)
    …of experience in high-performance CPU , cache subsystem or AI accelerator logic/ RTL design including microarchitecture definition and PPA optimizations. + 10 ... + Lead and manage a team of design engineers working on CPU , cache subsystem,...emphasizing on microarchitecture and Register-Transfer Level ( RTL ) design for the next generation CPU subsystem.… more
    Google (05/15/25)
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  • CPU Power Analysis Lead

    Qualcomm (Santa Clara, CA)
    …on RTL and Netlist using tools like Joules and PTPX. + Work closely with RTL design , Synthesis, and physical design teams to measure and optimize power. ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** + Drive Power analysis and...+ Evaluate and propose new power optimization techniques at RTL , Synthesis and Physical Design Stages. +… more
    Qualcomm (04/16/25)
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  • CPU Constraint Performance Modeling…

    Qualcomm (Santa Clara, CA)
    …features and sections of the CPU architectural performance/power model + Work with RTL and design team to assess implementation cost for new features + ... them, corelated and characterize them and work with the design team in productizing them. This will also include...consumption and estimating power as proxy. + Collaborate with CPU Performance Architecture and RTL team members… more
    Qualcomm (03/04/25)
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  • CPU Performance Engineer - Sr Engineer

    Qualcomm (Santa Clara, CA)
    …Qualcomm CPU Engineer, you will lead innovative Central Processing Unit ( CPU ) design efforts that have a critical impact on industries across the world. ... Qualcomm Engineers collaborate with cross-functional teams to design , verify, and implement multi-core CPU operations...MMU, caches, retire, etc. + Verify performance feature between RTL and model, and have ability to troubleshooting +… more
    Qualcomm (05/15/25)
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  • Lead NoC Performance Architect

    Qualcomm (Santa Clara, CA)
    …range of SoCs spanning multiple product streams, correlate models against RTL behavior, prototype ideas and help productize performance/power features for future ... C++ and Perl / Python + Ability to independently lead and mentor a team of junior performance architects...Science/Computer Engineering/Electrical Engineer with 10+ years of experience in CPU / SoC performance/power modeling, analysis / debug +… more
    Qualcomm (05/20/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale…

    Amazon (Cupertino, CA)
    …specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts * Lead and Design to meet requirements or solve a system problem ... - Have a "Learn and Be Curious" mindset - Have familiarity with accelerator design , interconnects, DMAs, Memory sub-systems, CPU cores, SIMDs, debug and system… more
    Amazon (03/15/25)
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  • ASIC Engineer, Networking Architecture

    Meta (Sunnyvale, CA)
    …with cross functional teams working on data center networking architecture, network system design , micro-architecture, RTL design , Design Verification, ... infrastructure silicon products collaborating with cross-functional partners and NIC technical lead 3. Provide technical support in functional model development to… more
    Meta (05/14/25)
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  • Senior System Architect, Hardware Architecture

    Amazon (Sunnyvale, CA)
    …development for prototyping (Python, C/C++, Java, etc.) or hardware development (System C, RTL design , FPGA design ). * Strong communication skills, ability ... concepts not yet announced. You will serve as the lead technical point of contact that the product management...the process of architecture definition, you will drive key design decisions such as edge-cloud compute partition, device SoC… more
    Amazon (04/25/25)
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  • Functional Verification Applications Engineer…

    Siemens (Fremont, CA)
    …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...ASICs and SoCs, Failure analysis and resolution, Coverage analysis, RTL /Gate-simulations, Regression debug and other flow/infrastructure development and testing… more
    Siemens (05/17/25)
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  • Applications Engineer Consultant EDA Functional…

    Siemens (Fremont, CA)
    …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and… more
    Siemens (03/18/25)
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  • Senior GPU Architect

    NVIDIA (Santa Clara, CA)
    …group is looking for world class architects and software developers to join and lead our various architecture efforts. A key part of NVIDIA's strength is to innovate ... architects and researchers to build simulators and infrastructure to design and validate these new features. What you'll be...+ Be hungry to learn and work on simulators, RTL and real silicon. What we need to see:… more
    NVIDIA (03/04/25)
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  • FPGA Engineer

    quadric.io, Inc (Burlingame, CA)
    …systems Vivado or equivalent toolchain + Experience with implementing flows to map CPU /GPU RTL on FPGA based platforms for emulation purposes Responsibilities + ... a key member of the engineering team, you will lead development of prototyping platforms (FPGA and HAPS). Hands...Computer Science + 7+ years of experience in FPGA design and implementation + Experience with FPGA and/or HAPS… more
    quadric.io, Inc (03/11/25)
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