- SQL Pager LLC (Sunnyvale, CA)
- … memory ordering Virtualization, Hypervisor CPU Caches and Coherence, MMU, Memory / DRAM Controller, Latency-hiding Inter-connect bus fabric, AMBA, CHI, NoC ... Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their industry. Using its proven AI accelerator designs, Client is… more
- NVIDIA (Santa Clara, CA)
- …and implement firmware for the memory subsystem, including silicon bring-up, validation , and debugging for NVIDIA SoC products. + Software and Configuration ... complexity optimization, and comprehensive validation . + Architecture Review: Analyze DRAM datasheets, Memory Subsystem Architecture, and SoC … more
- NVIDIA (Santa Clara, CA)
- …and implement firmware for the memory subsystem, including silicon bring-up, validation , and debugging for NVIDIA SoC products. + Software and Configuration ... complexity optimization, and comprehensive validation . + Architecture Review: Analyze DRAM datasheets, Memory Subsystem Architecture, and SoC … more
- NVIDIA (Santa Clara, CA)
- …bring up memory evaluation / validation and failure issues on memory technology. + Collaborate with DRAM suppliers and industry partners on to develop ... to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems....experience) + 10 years of proven track record in DRAM design, module design, or memory sub… more
- NVIDIA (Santa Clara, CA)
- …firmware. + You will be the primary contact for customers internal and external, and DRAM vendors for silicon issues relating to memory . + Contribute through the ... We are seeking Lead Post-Silicon Validation Engineer within the GPU Engineering Team to...help lead post-silicon bringup, characterization, and productization of the memory system for NVIDIA's GPU products. + Develop, qualify,… more
