- SQL Pager LLC (Sunnyvale, CA)
- Principal/Senior Staff / Staff ASIC Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their industry. Using ... ( Staff ) of general experience as a CPU Design Engineer for building complex SoCs. ◦...Programmable Interrupt Controller Debug and Trace Low Power Implementation. Chip Security Cryptography Nice to have Experience in working… more
- Cognichip (Redwood City, CA)
- …possible at the nexus of silicon design and machine learning. As a Staff Chip Design Engineer on our team, you'll tackle real-world scientific and ... the processes for dataset collection, curation, and enhancement. You'll fuse knowledge of chip design and ML into end-to-end silicon design flows. If you… more
- Microchip (San Jose, CA)
- Senior Technical Staff Engineer - Design for Test Company Description Are you looking for a unique opportunity to be a part of something great? Want to join ... timing closure, power analysis during test and quantifying full chip test coverage. Establish and maintain DFT design... chip test coverage. Establish and maintain DFT design and insertion guidelines and documents best practices for… more
- Advanced Micro Devices, Inc. (San Jose, CA)
- …where communication and teamwork are highly valued. Key Responsibilities As an ASIC Design Engineer , your responsibilities span various aspects of SOC design ... with other specialists that are members of the SOC Design - Verification, Emulation, STA, and Physical Design...Experience Hands on experience in all aspects of the chip development process with proficiency in front end tools… more
- Advanced Micro Devices (San Jose, CA)
- …beyond. Together, we advance your career. THE ROLE: We are looking for a self‑motivated senior design engineer to be part of a leading team to drive and improve ... As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip ‑to‑ chip interconnect, both on system and on package,… more
- AMD (San Jose, CA)
- …beyond. Together, we advance your career. The Role We are looking for a self‑motivated senior design engineer to be part of a leading team to drive and improve ... As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip ‑to‑ chip interconnect, both on system and on package,… more
- Conductor (San Jose, CA)
- …including Virtuoso, Calibre LVS, DRC, SkillCad, and similar. Have experience with chip ‑level design , eg, bump, pad, and ESD strategies. Communicate effectively ... Work policy. What You'll Do As a senior high‑speed mixed‑signal layout/analog engineer , you will work with circuit designers located in San Jose, California,… more
- Samsung Semiconductor, Inc. (San Jose, CA)
- Position Title: Senior Staff Engineer , Serdes Layout Design...SkillCad and so on. Desire to have experience on chip level design , like bump, pad, and ... Do As a senior high speed mixed-signal layout/analog layout engineer , you will be working with circuit designers located...policy Working with remote circuit designers to determine the chip floorplan. You need to come up with strategies… more
- Samsung Semiconductor (San Jose, CA)
- Senior Staff Engineer , Serdes Layout Design ...Calibre LVS, DRC, SkillCad, and so on. Experience on chip level design , like bump, pad, and ESD ... Work policy. What You'll Do As a senior high‑speed mixed‑signal layout/analog layout engineer , you will be working with circuit designers located in San Jose, CA… more
- AMD (San Jose, CA)
- …we advance your career. THE ROLE We are seeking a Senior Member of Technical Staff (SMTS) SoC Architect to join our SoC Architecture team. In this role, you will ... functions across roadmap and custom devices. You will focus on chip pervasive components, while ensuring seamless integration with processor subsystems,… more
- Conductor (San Jose, CA)
- …for researching and evaluating new device architectures, materials, and integration schemes through chip design metrics to meet the need of sub-2nm technology ... and explore future logic technology paths, capabilities, and applications through design /system-technology optimization (DTCO). The candidate will be a key technical… more
- Celestica (San Jose, CA)
- …Celestica is the brand behind the brands you love in tech. We design , develop, and manufacture leading-edge Hardware Platform Solutions in Networking, Storage, and ... drive to find the way for our customers. **Let's engineer the future together.** **Summary** Join a world class...servers, switches, and accelerators. We work hard together to design at the leading edge of cooling technology. Must… more
- Celestica (San Jose, CA)
- …systems such as AI servers, switches, and accelerators. We work hard together to design at the leading edge of cooling technology. Must have relevant coursework in ... and nonconfrontational culture. **Detailed Description** + Complete ownership of thermal design for various electronic products from thermal modeling, design ,… more
- Amazon (Sunnyvale, CA)
- …in locations without reliable connectivity. Come work at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design ... Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites...and system engineers to drive hardware micro-architecture. - Lead design of 1 or more DSP data path modules… more
- LinkedIn (Mountain View, CA)
- …to meet stringent uptime and performance targets. They lead the design , construction, commissioning, and lifecycle maintenance of physical infrastructure, drive Root ... the DCE team apply deep electrical and mechanical engineering expertise to design , construct, and maintain data center facilities, ensuring optimal efficiency and… more
- Google (Sunnyvale, CA)
- …technologies that power all of Google's services. As a Staff Thermal Systems Engineer , you will lead teams to design and evaluate our IT/data center thermal ... Staff Thermal Systems Engineer , Google Cloud...**Minimum qualifications:** + Bachelor's degree in Mechanical Engineering, Product Design , or related field, or equivalent practical experience. +… more
- Amazon (Cupertino, CA)
- …resources here to help you develop into a better-rounded professional. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning servers. As a member of ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...Curious" mindset About the team Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning… more
- Amazon (Cupertino, CA)
- … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning...Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning...Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning...Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers… more
