- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- Northrop Grumman (Linthicum Heights, MD)
- …and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding ... of digital design concepts + Responsible with ASIC development process. + Knowledgeable in VHDL, Verilog or...or SystemVerilog RTL coding and be highly proficient in DFT methodologies. + Responsible for operating in a team… more
- Broadcom (San Jose, CA)
- …already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Quality Engineer ** Broadcom's ASIC Product Division is ... seeking candidates for a DFT Quality Engineer position at our San Jose design center in...for test/yield optimization (outlier analysis, etc)_ + Ensure Broadcom ASIC Product Division understands the test industry -- test… more
- Broadcom (Fort Collins, CO)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Design Automation Engineer ** Broadcom's ASIC Products Division ... Development Engineer in the Design For Test ( DFT ) team developing SoC ASIC products. They...products and usage methodology to a world-wide, cutting edge, ASIC DFT technology development and implementation team.… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer , Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... timing analysis and timing ECO creation, timing margins). + Experience in DFT architectures and associated test methodologies. + Experience in Tessent generated … more
- Cadence Design Systems, Inc. (Austin, TX)
- …on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... preferred. + Prior 5-15 years of professional experience in SoC/ ASIC Digital Design with focus on Design for Test... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- Broadcom (San Jose, CA)
- …switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. . You ... you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most… more
- Northrop Grumman (Jessup, MD)
- …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. ... level. Qualifications for both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in a… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Cisco (San Francisco, CA)
- …opens. Applications are accepted until further notice. **Meet the Team** The ASIC Group works closely with other development teams within Cisco, including marketing, ... work will affect billions globally. **Your Impact** ** ** Join our award-winning ASIC team, where you'll collaborate with top industry talent to design and deliver… more
- RTX Corporation (Salt Lake City, UT)
- …for a security clearance **Security Clearance:** DoD Clearance: Secret **Principal Electrical Engineer ** **- ASIC /FPGA (Onsite)** This position is for a ... and information assurance products. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure,… more
- Teledyne (Goleta, CA)
- …of being on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer : Oversees definition, design, verification, and documentation ... (timing, area, power). + Multi-corner, multi-mode (MCMM) analysis. + DFT /ATPG insertion (scan chains, BIST for ASIC ...+ DFT /ATPG insertion (scan chains, BIST for ASIC testability). + Clock/Power optimization for low-power ASICs. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 5+...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT ,… more
- RTX Corporation (El Segundo, CA)
- …the Microelectronics Technology team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, ... tools and practices for continuous improvement in the group's ASIC / FPGA design flow + Contribute to engineering...present one's work and status + Design for Test ( DFT ) and manufacturability issues + Experience with Unix, scripting,… more