- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and ... to completion with limited supervision and guidance. Essential Functions: Develop verification methodology and testbenches for digital and mixed-signal blocks… more
- Micron Technology, Inc. (Boise, ID)
- …test solutions and enhancing system performance. **Responsibilities** + Derive SoC/FPGA and/or ASIC design specifications from system requirements + Using HDL, ... in Electrical Engineering or related discipline. + Proficiency with FPGA/ ASIC design using HDL such as Verilog/VHDL...AMD/Xilinx Vivado, or Altera/Intel Questa + Knowledge of UVM methodology for verification . + Expertise in laboratory… more
- Google (Sunnyvale, CA)
- ASIC Design Verification and Methodology Engineer, Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, ... by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer, you will be the catalyst for change,… more
- NVIDIA (Durham, NC)
- …of relevant work or research experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... for our Memory Management Unit. NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's...designs is a huge plus. + Experience with Universal Verification Methodology (UVM), SystemVerilog checkers and scoreboards.… more
- NVIDIA (Santa Clara, CA)
- …years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the...working across many NVIDIA teams from software, to architecture, design , methodology , and more. The GPU is… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Network Design Verification ...cycles 9. 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 8+… more
- Lockheed Martin (King Of Prussia, PA)
- …verification plan for a given design \. * Use SystemVerilog and Universal Verification Methodology \(UVM\) to verify a design in a Linux\-based ... verification team to resolve bugs found in the design \. * Support other aspects of ASIC ...in ASIC / FPGA life cycle \(architecture, design , simulation, verification , validation, integration & test\)\.… more
- Google (Mountain View, CA)
- ASIC Design Verification Engineer, Devices and Services _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... unparalleled performance, efficiency, and integration. As an Application-Specific Integrated Circuit ( ASIC ) Design Verification Engineer, you will be… more
- Google (Mountain View, CA)
- Staff ASIC Design Verification Engineer, Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes ... at RTL and GLS level using SystemVerilog or C/C++ or Universal Verification Methodology (UVM). + Experience with system-level architecture, scripting languages,… more
- Northrop Grumman (Annapolis Junction, MD)
- …+ Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with scripting languages (Bash, Perl, Python, ... FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with scripting...with Polygraph. + Experience with Mentor Graphics and/or Cadence Verification tools - FPGA/ ASIC Design … more
- NVIDIA (Santa Clara, CA)
- …(or equivalent experience) + Strong communication and problem solving skills + Exposure to ASIC design , ASIC verification and computer architecture, + ... NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the...working across many NVIDIA teams from software, to architecture, design , methodology , and more. The GPU is… more
- Meta (Annapolis, MD)
- …ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards creating a first-pass ... Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the...equivalent practical experience 9. 8+ years of experience in Design Verification 10. 5+ years of experience… more
- Amazon (San Diego, CA)
- …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure functional ... you will: . Implement a state of the art verification environment to facilitate testing of the RTL against...correctness . Work with the design and communication systems team and participate in system… more
- NVIDIA (Austin, TX)
- …proven design verification experience + Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design /implementation flow, and design ... NVIDIA is looking for a Senior ASIC Verification Engineer to help verify...components using SV/UVM methodology + Driving coverage-based verification closure + Collaborate with design teams… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, ... the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will...Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent… more
- NVIDIA (Austin, TX)
- NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... (or equivalent experience) + 5+ years of experience + Experience with verification methodology , creating reusable verification components + Knowledgeable… more
- NVIDIA (Durham, NC)
- NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... of relevant work or research experience + Strong history of working on verification methodology , creating reusable verification components + Knowledgeable in… more
- Lockheed Martin (Fort Worth, TX)
- …* Demonstrated experience in ASIC / FPGA life cycle \(architecture, design , simulation, verification , validation, integration & test\)\. * Knowledgeable in ... **Description:** **We are** _Lockheed Martin_ You will be a ASIC & FPGA Design Engineer on the...teams unique expertise in System Verilog and the Universal Verification Methodology \(UVM\) in verifying FPGA\-based designs… more
