- Amazon (North Reading, MA)
- …Masters or Ph.D degree in Electrical / Communications Engineering Exposure to formal verification Experience with physical implementation flows Amazon is an ... time to revenue. Innovators will be delighted with our integrated verification /validation environment that is used to perform architectural modeling to post-silicon… more
- Amazon (San Diego, CA)
- …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation Run formal verification of complex blocks to ensure functional ... Project Kuiper Digital Chip Socs Engineer Be part of Project Kuiper's sub-team responsible...of experience in emulation Familiarity with Matlab Familiarity with formal verification techniques Strong written and verbal… more
- Amazon (Sunnyvale, CA)
- …systems. Familiarity with UVM and Matlab. Ability to write assertions and exposure to Formal verification . Amazon is an equal opportunity employer and does not ... work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design...silicon solutions, and meeting the power objectives. Create standalone verification test bench to verify the correctness of your… more
- Amazon (Austin, TX)
- …methodology. Develop, regress and deploy digital implementation flows including synthesis and formal verification . Enable digital design teams to meet PPA ... Senior Cad Engineer Project Kuiper is an initiative to launch...methodology and debugging techniques. Familiar with basic synthesis and formal verification methodology and flow development experience.… more
- Meta (Jefferson City, MO)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an ** ASIC & FPGA Lead Verification Engineer ** where you will support over 50 different programs and research and ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer **...test pattern generation, logic equivalency checking, linting and/or other formal design checks\. * Knowledge of space\-grade/qualified FPGAs and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 17.… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 14.… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Cisco (San Jose, CA)
- ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - ... Verilog / UVM programming + 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools...Understanding of Networking technologies and concepts + Experience with Formal verification + Experience with Post-silicon lab… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer , Technical...MMU. + Experience with Veloce/HAPS is a plus + Formal verification (iev/vc formal ) knowledge is ... Work With:** You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with … more
- SpaceX (Sunnyvale, CA)
- Principal ASIC Verification Engineer Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. PRINCIPAL ASIC VERIFICATION ENGINEER (SILICON ENGINEERING)...+ Strong debugging skillset + Experience in constrained random verification + Experience with Formal verification… more
- Qualcomm (San Diego, CA)
- …that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate ... smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design,...Science, Engineering, or related field and 4+ years of ASIC design, verification , validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Amazon (North Reading, MA)
- …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation - Run formal verification of complex blocks to ensure ... preferably in communication systems - Familiarity with Matlab - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an… more
- Amazon (Sunnyvale, CA)
- …in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- Amazon (San Diego, CA)
- …run regressions, collect coverage matrices and report progress to the program * Run formal verification of complex blocks to ensure functional correctness * Work ... (DSP or MODEM) implementations * Familiarity with Matlab * Familiarity with formal verification techniques * Strong written and verbal skills Amazon is an equal… more
- Amazon (Sunnyvale, CA)
- …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
